臺灣博碩士論文加值系統

此論文設計、模擬與分析一寬頻AB類功率放大器，並使用台積電所提供之六十五奈米CMOS製程下線，論文共分五章，前兩章說明功率放大器的應用以及相關設計理論，接著為此功率放大器的設計流程、電路模擬和結果分析，完整的電路包含射頻發射器的輸入緩衝級、功率級以及連接至輸出端的平衡-不平衡變壓器。
主要研究的寬頻AB類功率放大器將應用於短脈衝射頻發射器，兩個相位差一百八十度之時脈訊號經過時脈緩衝開關後輸出至功率放大器，此時脈訊號即為功率放大器之操作頻率，經過時脈緩衝開關後，訊號會成為寬度一奈秒、週期一百奈秒之短脈衝，而後經過功率放大器將阻抗轉換為五十歐姆的輸出阻抗，並接至天線量測。發射器電源電壓為1.0V，啟動時的功率消耗約為33mW，而功率放大器在主操作頻率7.5GHz時輸出飽和功率達9dBm以上，輸入三階截止點為13dBm，功率附加效率則為25％，可操作頻寬由3.2GHz至8.6GHz，而此頻寬定義為三分貝之正向電壓增益衰減，且輸出反射係數需小於負六分貝，另外因應計劃需求，在主操作頻率7.5GHz附近將有最低的輸出反射係數，以避免量測用之印刷電路板上形成駐波進而影響輸出結果。

In this thesis, there is a wideband class-AB power amplifier (PA) had been designed, simulated, analyzed, and taped out with TSMC 65nm CMOS technology. The thesis is organized into five chapters. The first two chapters are the applications, related parameters, and design theories of the PA. The other chapters are about the design flow, circuit simulation and results analysis. The complete circuit is a radio-frequency transmitter, which includes an input buffer stage, a power stage, and a balance to unbalance transformer to connect with the output port.
The wideband class-AB PA is applied to the impulse radio-frequency transmitter. There will be two opposite phase clock signal through the switchable clock buffer to the PA, and the frequency of the clock signal will be the operation frequency of the PA. After the signal through the buffer, it will become a 1ns impulse with 100ns period, and then the PA will increase the power of the output signal for antenna measurements. The power supply of the transmitter is 1.0V, and the power consumption is about 33mW when turn on. The main operation frequency of the PA is 7.5GHz with 9dBm saturation power, 13dBm IIP3, and 25％ PAE. The operational bandwidth of the circuit is 3.2GHz to 8.6GHz. The definition of the bandwidth in this design is 3dB decrease of S21 and S22 should be smaller than -6dB to avoid the formation of standing wave on the PCB.

摘要
Abstract
目錄
圖目錄
表目錄
第一章 緒論
1-1 研究動機
1-2 研究方法
1-3 論文架構
第二章 功率放大器及相關研究
2-1 跨導式功率放大器 (Transconductance Power Amplifier)
2-1-1 A類功率放大器 (Class A Power Amplifier)
2-1-2 B類功率放大器 (Class B Power Amplifier)
2-1-3 AB類功率放大器 (Class AB Power Amplifier)
2-1-4 C類功率放大器 (Class C Power Amplifier)
2-2 切換式功率放大器 (Switching Mode Power Amplifier)
2-2-1 E類功率放大器 (Class E Power Amplifier)
2-2-2 F類功率放大器 (Class F Power Amplifier)
2-3 功率放大器相關參數
2-3-1 一分貝增益壓縮點 (One dB Gain Compression Point, P1dB)
2-3-2 飽和功率 (Saturation Power, Psat)
2-3-3 能量轉換效率 (Drain Efficiency, PE)
2-3-4 功率附加效率 (Power Added Efficiency, PAE)
2-3-5 穩定度 (Stability)
2-3-6 互調失真 (Intermodulation, IMD)
2-3-7 三階截止點 (Third-Order Intercept Point, IP3 or TOI)
2-4 平衡-不平衡變壓器 (Balance to Unbalance Transformer, Balun)
第三章 功率放大器設計流程
3-1 功率放大器規格及應用
3-2 時脈緩衝開關
3-3 功率放大器電晶體架構
3-4 功率放大器輸出端最佳負載
3-5 平衡-不平衡變壓器設計
3-6 功率放大器完整電路
第四章 電路模擬及分析
4-1 時脈緩衝開關模擬及分析
4-2 平衡-不平衡變壓器模擬及分析
4-3 功率放大器模擬及分析
4-4 發射器模擬及分析
4-5 電路佈局
第五章 結論
參考文獻

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