臺灣博碩士論文加值系統

本論文主要以二次多項式為目標所做的電路合成設計，所合成的二次多項式的CMOS電流模式之類比電路，使用者只須設定所要的二次多項式的係數之數值，即會產生此電路以及組成電路之MOS的長寬比值與相關數據供使用者參考與使用，大幅減少了使用者在設計上所花費的時間與精力，並且讓使用者先行了解在設計上會遇到的困難，及解決的方法。
本文設計的二次多項式電路使用TSMC 0.35μm CMOS製程技術，來模擬所合成出的電路在實際晶片下製作所會發生的狀況，本論文所設計的多項式電路經佈局後，電流輸入範圍為-120μA~120μA，而模擬所得的頻寬約為210MHz。

This thesis discusses the circuits of quadratic synthesized with CMOS current mode. The users only need to set the coefficients of quadratic they want, will generate the circuit W/L ratio of MOS and others parameters. These data are supplied to user to reduce a great deal of time and money, and understanding the problems and solutions of Circuit design.
The circuits of quadratic in this thesis utilize 0.35um CMOS process in TSMC to simulate which the situation is in real chip manufacture. After layout of proposed circuit, the results show that the area is 0.32x0.32(mm2), the range of current input is -120μA to +120μA and band width is 210MHz.

中文摘要 ...................................................... I
目錄 ......................................................... II
表目錄 ........................................................ V
圖目錄 ........................................................ VI
第一章 緒論..................................................... 1
1.1 前言 ...................................................... 1
1.2 研究目的與研究方法 ........................................... 5
1.3 論文架構 ................................................... 6
第二章 平方電路 .................................................. 7
2.1 平方電路簡介 ................................................ 7
2.2 平方電路公式推導 ............................................. 8
第三章 二次多項式電路設計與模擬 .................................... 11
3.1 前言 ...................................................... 11
3.2 二次多項式電路之設計 ......................................... 11
3.2.1 二次多項式電路架構 ......................................... 11
3.2.2 電路架構參數值設定 ......................................... 14
3.2.3 二次多項式電路係數設定推導 ................................... 15
3.2.3.1 係數a、b、c為正正正之公式推導 .............................. 15
3.2.3.2 係數a、b、c為正正負之公式推導 .............................. 16
3.2.3.3 係數a、b、c為負正正之公式推導 .............................. 18
3.2.3.4 係數a、b、c為負正負之公式推導 .............................. 19
3.2.4 二次多項式電路架構設定流程圖.................................. 20
3.3 二次多項式電路架構組合 ........................................ 22
3.3.1 多項式係數組合狀態 ......................................... 22
3.3.2 (a,b,c,c-a) = (+,+,+,+) 組合電路 ......................... 22
3.3.3 (a,b,c,c-a) = (+,+,-,-) = (+,+,+,-) 組合電路 ............. 23
3.3.4 (a,b,c,c-a) = (-,+,+,+) = (-,+,-,-) 組合電路 ............. 23
3.3.5 (a,b,c,c-a) = (-,+,-,+) 組合電路 ......................... 24
3.3.6 (a,b,c,c-a) = (+,-,+,+) 組合電路 ......................... 24
3.3.7 (a,b,c,c-a) = (+,-,-,-) = (+,-,+,-) 組合電路 ............. 25
3.3.8 (a,b,c,c-a) = (-,-,+,+) = (-,-,-,-) 組合電路 ............. 26
3.3.9 (a,b,c,c-a) = (-,-,-,+) 組合電路 ......................... 26
3.3.10 組合電路結論 ............................................. 27
3.4 K值匹配之設計 ............................................... 28
3.4.1 K值匹配設定之簡介 .......................................... 28
3.4.2 K值匹配設定之流程圖 ........................................ 29
3.4.3 K值匹配之誤差 ............................................. 30
3.5 電路設計上相關之問題 .......................................... 31
3.5.1 係數比值問題 .............................................. 31
3.5.1.1 產生負比值之情況介紹 ...................................... 31
3.5.1.2 係數比值問題修正電路之架構 ................................. 32
3.5.2 鏡射後之製程參數值問題 ...................................... 33
3.5.3 電路模擬 ................................................. 34
3.6 二次多項式電路電壓設計 ........................................ 35
3.7 二次多項式電路功率消耗分析..................................... 35
3.8 二次多項式電路模擬 ........................................... 37
3.8.1 多項式x2+4x+2之電路模擬.................................... 37
3.8.2 多項式x2+6x-2之電路模擬 ................................... 40
3.8.3 多項式-3x2+8x+1之電路模擬 ................................. 42
3.8.4 多項式-4x2+11x-6之電路模擬 ................................ 44
第四章 二次多項式電路晶片設計....................................... 46
4.1 設計概念.................................................... 46
4.2 電路架構設計 ................................................ 46
4.2.1 定電流電路架構設計 ......................................... 46
4.2.2 x2+4x+2的電路架構設計 ..................................... 47
4.2.3 x2+6x-2的電路架構設計 ..................................... 49
4.2.4 -3x2+8x+1的電路架構設計 ................................... 50
4.3 多項式電路晶片佈局設計 ........................................ 52
4.4 多項式電路晶片模擬 ........................................... 53
4.4.1 Post-simulation模擬 ..................................... 53
4.4.2 TT、FF、FS、SF、SS模擬 .................................... 55
4.4.3 電壓變動模擬 .............................................. 55
4.4.4 頻寬模擬 ................................................. 59
第五章 結論..................................................... 60
參考文獻 ....................................................... 61

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