臺灣博碩士論文加值系統

在本篇論文中，研究W/SiO2/TiN與Ir/SiO2/TiN電阻式記憶體之雙極性電阻式切換特性，此外也研究於Ir/SiO2/TiN結構元件之互補式電阻切換特性。富有缺陷的SiO2切換層材料物性以x射線光電子能譜分析。在限制電流500µA 與200µA下量測W/SiO2/TiN元件得到典型的雙極性電阻切換，隨機抽取50個元件統計數據並分析，元件對元件的均一性大於75%。對於W/SiO2/TiN結構，低阻態由歐姆傳導所主導，高阻態則是由蕭特基發散所主導低電壓區，而跳躍導通主導高電壓區。另一方面，對於Ir/SiO2/TiN結構，在高阻態與低阻態的低電壓區皆以歐姆導通所主導，高電壓區則是以跳躍導通所主導。此外解釋以SiO2不同厚度的雙極性切換特性，並得到大於3小時的資料保存性，以1µs脈衝寬測得大於106循環的讀取耐久性。並以示意圖解釋使用不同上電極W與Ir元件施加電壓下的氧離子遷移切換機制。藉由給予適當電壓，在沒有金屬介面層的單層結構Ir/SiO2/TiN元件中發現互補式切換特性，低電壓區與高電壓區分別以空間電荷限制電流與F-N穿隧所主導，而互補式切換的機制以示意圖解釋氧離子與氧空缺對導通絲線的消長情形，最後在互補式切換元件中，得到以1µs脈衝寬測得大於104循環的讀取耐久性、可接受的電阻比值(大於10)也得到大於10的非線性因素，以上所得元件特性可用於將來的三維交叉點式記憶體運用。

In this thesis, bipolar resistive switching (BRS) characteristics using W/SiO2/TiN and Ir/SiO2/TiN RRAM structure have been investigated. Complementary resistive switching (CRS) using Ir/SiO2/TiN single cell has also been demonstrated. Defective SiO2 switching material is confirmed by X-ray photoelectron spectroscopy. Typical BRS are shown in W/SiO2/TiN stack at the current compliances of 500 µA and 200 µA. Statistical analysis is done by taking randomly 50 devices which confirm that device-to-device switching uniformity is ˃ 75%. In case of W/SiO2/TiN, the low resistance state (LRS) current shows Ohmic conduction, and high resistance state (HRS) current shows Schottky emission at low field and hopping conduction at higher field. On the other hand, both HRS and LRS show Ohmic conduction at low field, and hoping conduction is observed at higher field by using Ir/SiO2/TiN structure. The SiO2 thickness based BRS characteristics have been explained. In addition, good data retention of > 3hr and long read endurance of >106 cycles with a small pulse width of 1µs are observed. Resistive switching mechanism using W and Ir electrode is explained by oxygen ions migration under external bias has been explained by schematic model. The CRS is observed by tuning proper bias in Ir/SiO2/TiN single cell without metal interlayer. In CRS, low field and high field regimes are complied with space-charge limited current (SCLC) and Fowler-Nordheim (F-N) tunneling mechanism, respectively. The CRS mechanism has been explained considering oxygen ions migration or vacancy (VO) mediated filamentary schematic model. Superior read endurance of ˃104 cycles is obtained at small pulse width of 1 µs with acceptable resistance ratio of ~10. The non-linearity factor of >10 is also obtained, which is useful for future three-dimensional (3D) crossbar memory applications.

Contents
指導教授推薦書…………………………………………………………
口試委員審定書……………………………………………….. ………
致謝………………………………………………………………...……iii
中文摘要………………………………………………………………...iv
英文摘要………………………………………………………………...vi
Contents……………………………………………………………….viii
Figure Captions and Tables………………………………………...xi
Content of Table……………………………………………….. xviii
Chapter 1 Introduction……………………………………………...- 1 -
1.1 Background……………………………………………………- 1 -
1.2 Proceeding memory technologies……………………………..- 3 -
1.3 Fundamentals of RRAM………………………………………- 6 -
1.4 Switching mechanism of RRAM……………………………- 8 -
1.5 Review on SiO2 based RRAM……………………………… - 11 -
1.6 Complimentary resistive switching ………………………….- 17 -
1.7 Motivation……………………………………………………- 19 -
1.8 Organization of the Thesis …………………………………...- 20-

Chapter 2
Bipolar resistive switching characteristics using W/SiO2/TiN structure……………………………………………………………...-22-
2.1 Introduction…………………………………………………..- 22 -
2.2 Memory device fabrication…………………………………..- 22 -
2.3 XPS characteristics…………………………………………..- 24 -
2.4 Electrical Characteristics…………………………………….- 26 -
2.4.1 Current-voltage characteristics………………………...- 26 -
2.4.2 Cumulative probability distribution……………………- 28 -
2.4.3 Current conduction mechanism………………………..- 32 -
2.4.4 Self compliance and DC endurance……………………- 37 -
2.5 Summery……………………………………………………..- 39 -

Chapter 3
Bipolar resistive switching characteristics using Ir/SiO2/TiN structure………………………………………………………………-40-
3.1 Introduction…………………………………………………..- 40 -
3.2 Memory device fabrication…………………………………..- 40 -
3.3 Electrical characteristics……………………………………..- 42 -
3.3.1 Current-voltage (I-V) characteristic……………………- 42 -
3.3.2 Current conduction mechanism..………………………- 43 -
3.3.3 Current compliance dependent switching characteristics
…………………………………...…………………………..- 47 -
3.3.4 Endurance and data retention characteristics..…………- 49 -
3.3.4 Switching mechanism by schematic model…………....- 51 -
3.4 Summery……………………………………………………..- 54 -
Chapter 4
Complementary resistive switching and transport characteristics using Ir/SiO2/TiN structure……………………………………...- 55 -
4.1 Introduction…………………………………………………..- 55 -
4.2 Memory characteristics………………………………………- 56 -
4.2.1 I-V hysteresis of the CRS devices ……………………..- 56 -
4.2.2 Current conduction mechanism………………………..- 58 -
4.2.3 Schematic model……………………………………….- 61 -
4.2.4 Read endurance characteristics………………………...- 64 -
4.3 Summary……………………………………………………..- 65 -
Chapter 5 Conclusion……………………………………………...- 67 -
5.1 Conclusion…………………………………………………...- 67 -
5.2 Scope of future research work……………………………….- 69 -
Reference…………………………………………………………….- 70 -
List of publications and presentations………………………………..- 80 -

Figures Captions and Tables
Chapter 1
Fig. 1-1 Emerging Non-Volatile memory applications…………...- 2 -
Fig. 1-2 Advantages of RRAM over Flash for NVM application……..- 5 -
Fig. 1-3 Schematic of biased MIM structure for RRAM ……………- 6 -
Fig. 1-4 Current – Voltage (I – V) characteristics of bipolar resistive switching…………………………………………………………- 7 -
Fig. 1-5 (a) Filamentary type conduction model…………………….- 10 -
Fig. 1-5 (b) Observation of filament from SEM image……………...- 10 -
Fig. 1-5 (a) Interface type conduction model in RRAM devices…….- 10 -
Fig. 1-6 (a) Formation I-V of multilayer Zn:SiO2/SiO2 RRAM structure ……………………………………………………………………-12 -
Fig. 1-6 (b) Formation I-V of single layer Zn:SiO2 RRAM structure - 12 -
Fig. 1-7 Bipolar I-V of multilayer Zn:SiO2/SiO2 and single layer Zn:SiO2 RRAM structure………………………………………………...- 13 -
Fig. 1-8 (a) Cross sectional HRTEM of Ni/Ti/SiOx/p+-Si RRAM cell-14 -
Fig. 1-8 (b) DC endurance comparison between with Ti and without (w/o) Ti RRAM cell………………...………………………………...- 14 -
Fig. 1-9 (a) Typical bipolar I-V switching of Ti/In2O3:SiO2/Pt RRAM device…………………………………………………………...- 16 -
Fig. 1-9 (b) Formation of Ti/In2O3:SiO2/Pt RRAM device……...…- 16 -
Fig. 1-9 (c) Schematic of Ti/In2O3:SiO2/Pt RRAM device…………- 16 -
Fig. 1-9 (d) Retention of the Ti/In2O3:SiO2/Pt RRAM cell………...- 16 -
Fig. 1-10 (a) Sneak path problem in memristive crossbar structure…- 17 -
Fig. 1-10 (b) Schematic view of Pt/SiO2/GeSe/Cu/GeSe/SiO2/Pt structure………………………………………………………...- 17 -
Fig. 1-10 (c) CRS I-V characteristics of Pt/SiO2/GeSe/Cu/GeSe/SiO2/Pt structure………………………………………………………...- 19 -
Fig. 1-11 Asymmetric CRS I-V of Pt/SiOx/TiN RRAM device……..- 19 -
Fig. 1-10 Asymmetric CRS I-V of Pt/SiOx/TiN RRAM device……..- 19 -

Chapter 2
Fig. 2-1 Schematic diagram of process flow of the fabricated via-hole RRAM device…………………………………………- 24 -
Fig. 2-2 Broad scan spectra of 4 nm deposited SiO2 film containing O1s and C1s peaks…………………………………………………..- 25 -
Fig. 2-3 (a) Narrow scan spectra Si2p in SiO2 film…………………- 26 -
Fig. 2-3 (b) Narrow scan spectra of O1s in SiO2 film……………….- 26 -
Fig. 2-3 (c) Narrow scan spectra of C1s in SiO2 film……………….- 26 -
Fig. 2-4 Typical bipolar resistive switching characteristics of memory device S1………………………………………………………..- 28 -
Fig. 2-5 (a) Statistical distribution of RESET voltage of S1 device at two current compliances of 200 and 500µA………………………...- 30 -
Fig. 2-5 (b) Statistical distribution of HRS and LRS of 50 randomly picked S1 device at two current compliances of 200 µA and 500µA…………………………………………………………..- 30 -
Fig. 2-6 Typical I-V characteristics of memory device S1 with CC of 500µA and CC of 200µA……………………………………….- 31 -
Fig. 2-7 (a) Typical I-V characteristics for 500 µA CC re-plotted in log-log scale and fitted linearly for Set of LRS………………...- 31 -
Fig. 2-7 (b) Typical I-V characteristics for 500 µA CC re-plotted in log-log scale and fitted linearly for Reset of LRS……………...- 31 -
Fig. 2-8 (a) Typical I-V characteristics for 200 µA CC re-plotted in log-log scale and fitted linearly for LRS under positive ……….- 32 -
Fig. 2-8 (b) Typical I-V characteristics for 200 µA CC re-plotted in log-log scale and fitted linearly for LRS under negative……….- 32 -
Fig. 2-9 (a) Schottky fitting of HRS curve under positive bias at 500 µA CC………………………………………………………………- 35 -
Fig. 2-9 (b) Schottky fitting of HRS curve under negative bias at 500 µA CC………………………………………………………………- 35 -
Fig. 2-9 (c) Schottky fitting of HRS curve under positive bias at 200 µA CC………………………………………………………………- 35 -
Fig. 2-9 (d) Schottky fitting of HRS curve under negative bias at 200 µA CC………………………………………………………………- 35 -
Fig. 2-10 (a) Hopping conduction fitting of HRS curve under positive bias at 500 µA CC………………………………………………- 36 -
Fig. 2-10 (b) Hopping conduction fitting of HRS curve under negative bias at 500 µA CC………………………………………………- 36 -
Fig. 2-10 (c) Hopping conduction fitting of HRS curve under positive bias at 200 µA CC……………………………………………....- 36 -
Fig. 2-10 (d) Hopping conduction fitting of HRS curve under negative bias at 200 µA CC………………………………………………- 36 -
Fig. 2-11 (a) Typical I-V characteristics for self-compliance behavior of S1 device………………………………………………………..- 38 -
Fig. 2-11 (b) S1 mechanism schematic figure……………………….- 38 -
Fig. 2-12 Typical DC endurance of S1 device at self-compliance…...- 39-

Chapter 3
Fig. 3-1 Typical I-V switching characteristics of memory device S2..- 41 -
Fig. 3-2 Typical I-V switching characteristics of memory device S3..- 43 -
Fig. 3-3 (a) Typical study of current conduction mechanism using linear fitting for IRS of device S2……………………………………..- 44 -
Fig. 3-3 (b) Typical study of current conduction mechanism using linear fitting for IRS of device S3……………………………………..- 44 -
Fig. 3-4 (a) Typical study of current conduction mechanism using linear fitting for LRS of S2 device at 300µA CC during Set………….- 45 -
Fig. 3-4 (b) Typical study of current conduction mechanism using linear fitting for LRS of S2 device at 300µA CC during Reset……….- 45 -
Fig. 3-5 (a) Typical study of current conduction mechanism using linear fitting for HRS of S2 device at 300µA CC during Set…………- 46 -
Fig. 3-5 (b) Typical study of current conduction mechanism using linear fitting for HRS of S2 device at 300µA CC during Reset……….- 46 -
Fig. 3-6 (a) Typical study of current conduction mechanism using linear fitting for LRS of S2 device at 500µA CC during Set and……..- 47 -
Fig. 3-6 (b) Typical study of current conduction mechanism using linear fitting for LRS of S2 device at 500µA CC during Reset……….- 47 -
Fig. 3-7 (a) Typical study of current conduction mechanism using linear fitting for HRS of S2 device at 500µA CC during Set…………- 47 -
Fig. 3-7 (b) Typical study of current conduction mechanism using linear fitting for HRS of S2 device at 500µA CC during Reset……….- 47 -
Fig. 3-8(a) Typical study of current conduction mechanism using linear fitting for LRS of S3 device at 100µA CC of low field during SET……………………………………….…………………….- 49 -
Fig. 3-8(b) Typical study of current conduction mechanism using linear fitting for LRS of S3 device at 100µA CC of high field during SET……………………………………………………………..- 49 -
Fig. 3-8(c) Typical study of current conduction mechanism using linear fitting for LRS of S3 device at 100µA CC of low field during RESET…………………………………………………………- 49 -
Fig. 3-8(d) Typical study of current conduction mechanism using linear fitting for LRS of S3 device at 100µA CC of high field during RESET………………………………………………………... .- 49 -
Fig.3-9 (a) Typical study of current conduction mechanism using linear fitting for HRS of S3 device at 100µA CC of low field during SET…………………………………………………..…………- 50 -
Fig. 3-9 (b) Typical study of current conduction mechanism using linear fitting for HRS of S3 device at 100µA CC of high field during SET……………………………………………………….…….- 50 -
Fig. 3-9 (c) Typical study of current conduction mechanism using linear fitting for HRS of S3 device at 100µA CC of low field during RESET………………………………………………………….- 50 -
Fig. 3-9 (d) Typical study of current conduction mechanism using linear fitting for HRS of S3 device at 100µA CC of high field during RESET………………………………………………………….- 50 -
Fig. 3-10 (a) Typical multi-level switching of S2 device IV with varying CC in linear scale……………………………………………….- 52 -
Fig. 3-10 (b) Typical multi-level switching of S2 device IV RESET cycles of S2 at different CC in linear scale…………………………….- 52 -
Fig.3-11 Typical HRS and LRS values read at +2V with different current compliance of device S2……………………………………….. - 53 -
Fig.3-12 Typical DC endurance of S2 device at CC of 5 mA……….- 54 -
Fig. 3-13 (a) Typical long read endurance of 106 cycles of S2 device- 55 -
Fig. 3-13 (b) Typical data retention of S2 device……………………- 55 -
Fig. 3-16 (a) 2D schematic model of filament break and rupture mechanism for SET of devices S1……………………………...- 56 -
Fig. 3-16 (b) 2D schematic model of filament break and rupture mechanism for SET of devices S2……………………………...- 56 -
Fig. 3-16 (c) 2D schematic model of filament break and rupture mechanism for RESET of devices S1…………………………..- 56 -
Fig. 3-16 (d) 2D schematic model of filament break and rupture mechanism for RESET of devices S2…………………………..- 56 -

Chapter 4
Fig. 4-1(a) Typical CRS current-voltage (I-V) hysteresis of S3 at log scale……….................................................................................- 57 -
Fig. 4-1(b) Typical CRS current-voltage (I-V) hysteresis of S3 at linear scale…………………………………………………………….- 57 -
Fig. 4-2 (a) Log-log scale fitting at 0 to -2V regime of CRS………...- 60 -
Fig. 4-2 (b)Log-log scale fitting at 0 to +2V regime of CRS………..- 60 -
Fig. 4-3 (a) F-N tunneling conduction mechanism in high field region at -Ve bias of CRS………………………………………………....- 61 -
Fig. 4-3 (b) F-N tunneling conduction mechanism in high field region at +Ve bias region of CRS………………………………………...- 61 -
Fig. 4-4 Description of CRS mechanism in schematic model……….- 62 -
Fig. 4-5 Read endurance of ˃ 104 cycles of CRS device (S3)……....- 65 -

Content of Table
Chapter 1
Table 1-1 Classifications and present status of memory technologies...- 3-
Table 1-2 The comparison of dielectric constant (κ), band gap (Eg) and Gibb’s free energy (ΔG) for different metal oxides….……….....- 11-

Chapter 2
Table 2-1 Split table of the fabricated devices……………………......- 23-

[1] R. Waser Nanotechnology, Volume 3: Information Technology I. Wiley (2008).
[2] Pierre-Camille Lacaze, Jean-Claude Lacroix, “Non-nolatile Memories”, Wiley-ISTE publishers, Dec. 2014.
[3] Yole Development, “Emerging non - volatile memory (NVM) technologies & markets 2015”, http://www.slideshare.net /Yole_Developpement/yole-emerging-nonvolatilememorysample.
[4] F. Yinug, “The rise of the flash memory market: Its impact on firm behavior and global semiconductor trade patterns,” 2007.
[5] S. N. Keeney, "A 130nm generation high density EtoxTM flash memory technology," in Tech. Dig. - Int. Electron Devices Meet., 2001, pp. 2.5.1 - 2.5.4.
[6] A. Chen, S. Haddad, C. Y. Wu, “Nonvolatile resistive switching for advanced memory applications”, in Tech. Dig. - Int. Electron Devices Meet., 2005, pp. 746 - 749.
[7] International technology roadmap for semiconductors 2013 edition emerging research devices," http://www.itrs.net/Links/2013ITRS/2013Tables/ERD_2013Tables.xlsx.
[8] S. Raoux, R. M. Shelby, J. Jordan-Sweet, B. Munoz, M. Salinga, Y. C. Chen, Y. H. Shih, E. K. Lai, and M. H. Lee, "Phase change materials and their application to random access memory technology", Microelectron. Eng., vol. 85, pp. 2330-2333, 2008.
[9] S. R. Ovshinsky, “Reversible electrical switching phenomena in disordered structures”, Phys. Rev. Lett., Vol.21, pp. 1450-1454, 1968.
[10] V. Giraud, J. Cluzel, V. Sousa, A. Jacquot, A. Dauscher, B. Lenoir, H. Scherrer, and S. Romer, "Thermal characterization and analysis of phase change random access memory," J. Appl. Phys., vol. 98, pp. 013520-7, 2005.
[11] G. W. Burr, B. N. Kurdi, J. C. Scott, C. H. Lam, K. Gopalakrishnan, and R. S. Shenoy, "Overview of candidate device technologies for storage-class memory," IBM J. Res. Dev., vol. 52, pp. 449-464, 2008.
[12] Y. C. Chen, C. T. Rettner, S. Raoux, G. W. Burr, S. H. Chen, R. M. Shelby, M. Salinga, W. P. Risk, T. D. Happ, G. M. McClelland, M. Breitwischt, A. Schrott, J. B. Philipps, M. H. Lee, R. Cheek, T. Nirschl, M. Lamorey, C. F. Chen, E. Joseph, S. Zaidi, B. Yee, H. L. Lung, R. Bergmann, and C. Lam, "Ultra-thin phase-change bridge memory device using GeSb," in Tech. Dig. - Int. Electron Devices Meet., San Francisco, CA, 2006, pp. 1-4.
[13] R. E. Jones, P. D. Maniar, R. Moazzami, P. Zurcher, J. Z. Witowski, Y. T. Lii, P. Chu, and S. J. Gillespie, "Ferroelectric non-volatile memories for low-voltage, low-power applications", Thin Solid Film., vol. 270, pp. 584-588, 1995.
[14] W. Xin Yi, Y. Jun, W. Yun Bo, Z. Wen Li, G. Jun Xiong, and C. Xiao Hui, "Preparation and characterization of BPO film as electrode for using of FeRAM", Chinese Phys. Lett., pp. 2694, 2008.
[15] T. Mikolajick, C. Dehm, W. Hartner, I. Kasko, M. J. Kastner, N. Nagel, M. Moert, and C. Mazure, "FeRAM technology for high density applications", Microelectron. Reliab., vol. 41, pp. 947-950, 2001.
[16] E. T. Wertz and Q. Li, "Magneto resistance after initial demagnetization in La0.67Sr0.33] MnO3/SrTiO3/La0.67Sr0.33MnO3 magnetic tunnel junctions", Appl. Phys. Lett., vol. 90, 142506, 2007.
[17] Y. Ogimoto, M. Izumi, A. Sawa, T. Manako, H. Sato, H. Akoh, M. Kawasaki and Y. Tokura, "Tunneling magnetoresistance above room temperature in La0.7Sr0.3MnO3/SrTiO3/La0.7Sr0.3MnO3 junctions", Jpn. J. Appl. Phys., vol. 42, pp. L369-L372, 2003.
[18] W. F. Cheng, A. Ruotolo, Y. K. Chan, K. H. Wong, and C. W. Leung, "Spacerless metal-manganite pseudo-spin-valve structure", J. Appl. Phys., vol. 103, p. 103903, 2008.
[19] R. Waser and M. Aono, "Nanoionics-based resistive switching memories," Nat. Mater., vol. 6, pp. 833-840, 2007.
[20] A. Prakash, D. Jana and S. Maikap, "TaOx-based resistive switching memories: prospective and challenges," Nanoscale Res. Lett., vol. 8, p. 418, 2013.
[21] H. Y. Lee, Y. S. Chen, P. S. Chen, P. Y. Gu, Y. Y. Hsu, S. M. Wang, W. H. Liu, C. H. Tsai, S. S. Sheu, P. C. Chiang, W. P. Lin, C. H. Lin, W. S. Chen, F. T. Chen, C. H. Lien, and M. J. Tsai, "Evidence and solution of over-RESET problem for HfOx based resistive memory with sub-ns switching speed and high endurance," Tech. Dig. - Int. Electron Devices Meet., San Francisco, CA, 2010, pp. 19.7.1-19.7.4.
[22] A. C. Torrezan, J. P. Strachan, G. Medeiros-Ribeiro, and R. S. Williams, "Sub-nanosecond switching of a tantalum oxide memristor," Nanotechnology, vol. 22, p. 485203, 2011.
[23] J. J. Yang, D. B. Strukov, and D. R. Stewart, "Memristive devices for computing," Nat. Nanotechnol., vol. 8, pp. 13-24, 2013.
[24] T. W. Hickmott, "Low-frequency negative resistance in thin anodic oxide films," J. Appl. Phys., vol. 33, pp. 2669-2682, 1962.
[25] H.-S. P. Wong, H.-Y. Lee, S. Yu, Y.-S. Chen, Y. Wu, P.-S. Chen, B. Lee, F. T. Chen, and M.-J. Tsai, “Metal – Oxide RRAM,” IEEE Proceedings, vol. 100, no. 6, pp. 1951 – 1970, June 2012.
[26] D. Acharyya, A. Hazra, P. Bhattacharyya, “A journey towards reliability improvement of TiO2 based Resistive Random Access Memory: A review,” Microelectronics Reliability, vol. 54, pp. 541 – 560, Jan. 2014.
[27] A. Sawa, "Resistive switching in transition metal oxides," Mater. Today, vol. 11, pp. 28-36, 2008.
[28] Y. S. Chen, H. Y. Lee, P. S. Chen, T. Y. Wu, C. C. Wang, P. J. Tzeng, F. Chen, M. J. Tsai, and C. Lien, "An ultrathin forming-free HfOx resistance memory with excellent electrical performance," IEEE Electron Device Lett., vol. 31, pp. 1473-1475, 2010.
[29] W. Banerjee, S. Z. Rahaman, and S. Maikap, "Excellent uniformity and multilevel operation in formation-free low power resistive switching memory using IrOx/AlOx/W cross-point," Jpn. J. Appl. Phys., vol. 51, pp. 04DD10-6, 2012.
[30] R. Waser, R. Dittmann, G. Staikov, and K. Szot, "Redox-based resistive switching memories - nanoionic mechanisms, prospects, and challenges," Adv. Mater., vol. 21, pp. 2632-2663, 2009.
[31] M. -J. Lee, C. B. Lee, D. Lee, S. R. Lee, M. Chang, J. H. Hur, Y.-B. Kim, C.-J. Kim, D. H. Seo, S. Seo, U. I. Chung, I.-K. Yoo, and K. Kim, "A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O5−x/TaO2−x bilayer structures," Nat. Mater., vol. 10, pp. 625-630, 2011.
[32] R. Muenstermann, T. Menke, R. Dittmann, R. Waser, “Coexistence of filamentary and homogeneous resistive switching in Fe-doped SrTiO3 thin-film memristive devices”, Adv. Mat., vol. 22, pp. 4819, 2010.
[33] H. Jiang, X. Y. Li, R. Chen, X. L. Shao, J. H. Yoon, X. Hu, C. S. Hwang & J. Zhao, “Bias-polarity-dependent resistance switching in W/SiO2/Pt and W/SiO2/Si/Pt structures”, Scientific Reports, vol. 6, pp. 22216, Feb. 2016.
[34] W. Kim, S. Menzel, D. J. Wouters, Member IEEE, R. Waser, Member IEEE, and V. Rana, “3-Bit multi level switching by deep reset phenomenon in Pt/W/TaOX/Pt-ReRAM devices”, IEEE Electron Devices Lett., vol. 37, no. 5, May 2016.
[35] X. Cao, X. Li, X. Gao, W. Yu, X. Liu, Y. Zhang, L. Chen and X. Cheng, "Forming-free colossal resistive switching effect in rare-earth oxide Gd2O3 films for memristor application," J. App. Phys., vol. 106, pp. 073723-5, 2009.
[36] J. Robertson., "High dielectric constant oxides," Eur. Phys. J. Appl. Phys., vol. 28, pp. 265–291, 2014.
[37] N. Birks, G.H. Meier, F.S Pettit: Introduction to the high-temperature oxidation of metals. Cambridge: Cambridge University Press; 2006. http://www.doitpoms. ac.uk/tlplib/ellingham_diagrams/interactive.php.
[38] J. A. Dean, "LANGE'S HANDBOOK OF CHEMISTRY," McGRAW-HILL (2008).
[39] A. Mehonic, S. Cueff, M. Wojdak, S. Hudziak, O. Jambois, C. Labbe, B. Garrido, R. Rizk and A. J. Kenyon, “Resistive switching in silicon suboxide films”, J. Appl. Phys., vol. 111, no. 074507, April 2012.
[40] R. Zhang, T.-M. Tsai, T.-C. Chang, K.-C. Chang, K.-H. Chen, J.-C. Lou, T.-F. Young, J.-H. Chen, S.-Y. Huang, M.-C. Chen, C.-C. Shih, H.-L. Chen, J.-H. Pan, C.-W. Tung, Y.-E. Syu, and S. M. Sze, “Mechanism of power consumption inhibitive multi-layer Zn:SiO2/SiO2 structure resistance random access memory”, J. Appl. Phys., vol. 114, no. 234501, Dec. 2013.
[41] S. Kim, S. Cho, B. G. Park, “Improved resistive switching properties in SiOx-based resistive random-access memory cell with Ti buffer layer”, J. Vac. Sci. Technol. B, vol. 34, no. 022204, March 2016.
[42] W. K. Hsieh, K. T. Lam, S. J. Chang, “Asymmetric resistive switching characteristics of In2O3:SiO2 co-sputtered thin film memories”, J. Vac. Sci. Technol. B, vol. 32, no. 020603, Feb. 2014.
[43] K.-C. Chang, J. W. Huang, T.-C. Chang, T.-M. Tsai, K.-H. Chen, T.-F. Young, J.-H. Chen, R. Zhang, J.-C. Lou, S.-Y. Huang, Y. C. Huang, Y.-E. Syu, D. S. Gan, D. H. Bao, and S. M. Sze, “Space electric field concentrated effect for Zr:SiO2 RRAM devices using porous SiO2 buffer layer”, Nanoscale Res. Lett., vol. 8, no. 523, 2013.

[44] K.-H. Chen, K.-C. Chang, T.-C. Chang, T.-M. Tsai, S. P. Liang, T.-F. Young, Y.-E. Syu and S. M. Sze, “Illumination effect on bipolar switching properties of Gd:SiO2 RRAM devices using transparent indium tin oxide electrode”, Nanoscale Res. Lett., vol. 11, no. 224, 2016.
[45] E. Linn, R. Rosezin, C. Kugeler and R. Waser, “Complementary resistive switches for passive nanocrossbar memories”, Nat. Mater., vol. 9, pp. 403 – 406, April 2010.
[46] Y. T. Tseng, T.-M. Tsai, T.-C. Chang, C. C. Shih, K.-C. Chang, R. Zhang, K.-H. Chen, J.-H. Chen, Y. C. Li, C. Y. Lin, Y. C. Huang, Y.-E. Syu, J. C. Zheng, and S. M. Sze, “Complementary resistive switching behavior induced by varying forming current compliance in resistive random access memory”, Appl. Phys. Lett., vol. 106, no. 213505, May 2015.
[47] D. H. Lim, G. Y. Kim, J. H. Song, K. S. Jeong, D. H. Ko and M. H. Cho, “ Filament geometry induced bipolar, complementary and unipolar resistive switching under the same set current compliance in Pt/SiOx/TiN”, Scientific Reports, vol. 5, no. 15374, Oct. 2015.
[48] D. Jana, S. Samanta, S. Maikap and H. – M. Cheng, “Evolution of complementary resistive switching characteristics using IrOx/GdOx/Al2O3/TiN structure”, Appl. Phys. Lett., vol. 108, no. 011605, Jan. 2016.
[49] S. Schmelzer, E. Linn, U. Bottger and R. Waser, “Uniform complementary resistive switching in tantalum oxide using current sweeps”, IEEE Electron Device Lett., vol. 34, no. 1, Jan. 2013.
[50] K. J. Yoon, S. J. Song, J. Y. Seok, J. H. Yoon, T. H. Park, D. E. Kwon and C. S. Hwang, “Evolution of the shape of the conducting channel in complementary resistive switching transition metal oxides”, Nanoscale, vol. 6, pp. 2161 – 2169, 2014.
[51] W. C. Chien, Y. C. Chen, E. K. Lai, Y. D. Yao, P. Lin, S. F. Horng, J. Gong, T. H. Chou, H. M. Lin, M. N. Chang,Y. H. Shih, K. Y. Hsieh, and R. Liu, “Unipolar Switching Behaviors of RTO WOX RRAM”, IEE Electron Device Lett., vol. 31, no. 2, February 2010.
[52] A. Prakash, S. Maikap, C.S. Lai, T.C. Tien, W.S. Chen, H.Y. Lee, F.T. Chen , M.-J. Kao, and M.-J. Tsai, “Bipolar resistive switching memory using bilayer TaOx/WOx films”, Solid-State Electronics, vol. 77, pp. 35-40, 2012.
[53] A. Mehonic, M. Buckwell, L. Montesi, L. Garnett, S. Hudziak, S. Fearn, R. Chater, D. McPhail, and A. J. Kenyon, “Structural changes and conductance thresholds in metal-free intrinsic SiOx resistive random access memory”, J. Appl. Phys., vol. 117, no. 145505, 2015.
[54] Z. Li, and Y. Zhu , “Surface-modification of SiO2 nanoparticles with oleic acid”, Appl. Surface Sci., vol. 211, pp. 315-320, 2003.
[55] D. Ielmini, F. Nardi, abd C. Cagli, “Universal resest characteristics of unipolar and bipolar metal-oxide RRAM”, IEEE Transaction on Electron Devices, vol. 58, no. 10, 2011.
[56] S. M. Sze and K. K. Ng, “Physics of Semiconductor Devices”, John Wiley & Sons. Inc , 3rd edition, 2007.
[57] M. Lenzlinger and E. H. Snow, “Fowler‐Nordheim tunneling into thermally grown SiO2”, J. Appl. Phys., vol. 40, no. 278, 1969.
[58] D. A. Neaman, “Semiconductor Physics and Devices”, Mc.Graw Hill Companies . Inc , 4th edition , 2012.
[59] N. F. Mott and E. A. Davis, “Electronic Processes in Non-Crystalline Materials” , Oxford University Press, 1979.
[60] K. H. Chen, R. Zhang, T. C. Chang, T. M. Tsai, K. C. Chang, J. C. Lou, T.F. Young, J. H. Chen, C. C. Shih, C. W. Tung, Y. E. Syu, and S. M. Sze, “Hopping conduction distance dependent activation energy characteristics of Zn:SiO2 resistance random access memory devices”, Appl. Phys. Lett. Vol. 102, no. 133503, 2013.
[61] A. Prakash, S. Maikap, W. Banerjee1, D. Jana, and C. S. Lai, “Impact of electrically formed interfacial layer and improved memory characteristics of IrOx/high-κx/W structures containing AlOx, GdOx, HfOx, and TaOx switching materials”, Nanoscale Res. Lett., vol. 8, no. 379, 2013.
[62] W. Banerjee, S. Maikap, C. S. Lai, Y. Y. Chen, T. C. Tien, H. Y. Lee, W. S. Chen, F. T. Chen, M.J. Kao, M. J. Tsai , and J. R. Yang, “Formation polarity dependent improved resistive switching memory characteristics using nanoscale (1.3 nm) core-shell IrOx nano-dots”, Nanoscale Res. Lett., vol. 7, no. 194, 2012.
[63] A. Prakash, S. Maikap, S. Z. Rahaman, S. Majumdar, S. Manna and S. K. Ray, “Resistive switching memory characteristics of Ge/GeOx nanowires and evidence of oxygen ion migration”, Nanoscale Res. Lett., vol. 8, no. 220, 2013.
[64] P.J. Freud, “Electric-field-dependent conductivity for hopping-type charge transport”, vol.29, no. 17, 1972.
[65] C. Y. Ng, T. P. Chen, Y. Liu, and C. Q. Sun, “Influence of nitrogen on tunneling barrier heights and effective masses of electrons and holes at lightly-nitrided SiO2 /Si interface”, J. Appl. Phys., vol. 96, no. 10, Nov. 2004.
[66] W. C. Lee, C. Hu, “Modeling gate and substrate currents due to conduction- and valence-band electron and hole tunneling”, IEEE Symposium on VLSI, pp. 198 -199, 2000.
[67] R. Degraeve, A. Fantini, S. Clima, B. Govoreanu, L. Goux, Y.Y. Chen, D.J. Wouters, Ph. Roussel, G.S. Kar, G. Pourtois, S. Cosemans, J.A. Kittl, G. Groeseneken, M. Jurczak, L. Altimime,
“Dynamic ‘Hour Glass’ model for SET and RESET in HfO2 RRAM”, IEEE Symposium on VLSI Technology, pp. 75 -76, 2012.