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研究生:陳奇宏
研究生(外文):Che-Hong Chen
論文名稱:應用於正逆改良型離散餘弦轉換之高效率遞迴架構
論文名稱(外文):Efficient Recursive Structures for Forward and Inverse Modified Discrete Cosine Transforms
指導教授:劉濱達楊家輝楊家輝引用關係
指導教授(外文):Bin-Da LiuJar-Ferr Yang
學位類別:碩士
校院名稱:國立成功大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2000
畢業學年度:88
語文別:英文
論文頁數:91
中文關鍵詞:改良型離散餘弦轉換遞迴架構
外文關鍵詞:modified discrete cosine transformrecursive structurefinite impulse response filters
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MP3音樂壓縮格式為MPEG-1 Audio Layer3中制定之數位音響編碼標準,由於其優越性已被廣泛應用在網路及無線多媒體之播放與儲存。其中改良型離散餘弦轉換與反轉換(MDCT/IMDCT)是MPEG-1 Layer3中計算最繁複的步驟之一。本論文中我們提出一個遞迴式改良型離散餘弦轉換與反轉換,其核心以無限脈衝響應濾波器(IIR)為基礎的遞迴架構,利用多個濾波器架構來同時完成所有改良型離散餘弦轉換和反轉換的運算。其優點在於它是一個有效率的架構且具有高效能的特性,並具有規則性和模組性之優點。
遞迴式改良型離散餘弦轉換與反轉換非常適合於超大型積體電路之實現,我們將遞迴換演算法在TSMC SPQM 0.35µm製程技術之超大型積體電路設計出來,並利用COMPASS 0.35µm高性能的標準元件製作此架構。晶片佈局面積為 2mm 2mm,使用了7.5k邏輯閘。晶片實際測試結果顯示此晶片之時脈速度可達50MHZ。
The MP3 audio format uses the MPEG-1 audio Layer 3, which is one of the most advanced MPEG (Moving Picture Experts Group) standards for digital audio compression. The MPEG-1 audio Layer 3 has been widely used in internet and wireless communication and storage applications. The modified discrete cosine transform (MDCT) and its inverse transform (IMDCT) are the most complex operations in the MPEG-1 Layer 3 audio coding standard. In this thesis, we propose the new recursive structures for computing MDCT and IMDCT. This recursive structure is based on finite impulse response filters (IIR). We can use several IIR structures for concurrent computing MDCT and IMDCT components. The advantages of the proposed recursive IIR structure are rapid computational efficiency and high throughput rate.
With regularity and modularity, the proposed recursive MDCT and IMDCT figured is suitable for VLSI implementation. In this thesis, we also realize a VLSI chip, which can perform both of the efficient recursion algorithms by using COMPASS 0.35µm high performance cell library with TSMC SPQM 0.35µm process technology. The realized VLSI takes about 7.5k gates in 2mm 2mm silicon area. The measurement result shows that the chip can work at about 50MHz clock rate.
CONTENTS
1.INTRODUCTION…………………………………………………………… 1
1.1Motivation ………………………………………………………………1
1.2Organization of this thesis …………………………………………2
2.OVERVIEW OF THE MPEG AUDIO …………………….…..………4
2.1Motivation ………………………………………………….…..………4
2.2ISO/MPEG audio coding standard …………………………….………4
2.3MPEG-1 Audio …….……………………….…..………………….…6
2.3.1 Encoding …………………………………………………………….8
2.3.2 Decoding …………………………………………………………..10
2.4 MPEG-1 Layers I, II, III coding schemes……………………….10
2.5 MPEG-2………………………………………………………………….15
2.6 MPEG-4 ………………………………………………………………….16
2.7 MPEG audio compression ………………………………………..16
3.RECURSIVE STRUCTURES OF DISCRETE COSINE TRANSFORMAND MODIFIED DISCRETE COSINE TRANSFORM …………………………………………….……………..….19
3.1 Motivation ………….………………………………….……………...….…19
3.2 Discrete cosine transforms ………...…………….…….……….…………...21
3.3 Recursive structures with fixed coefficients ……………………..….22
3.3.1 Fixed recursive structure for DCT-Ⅲ ………………………………23
3.3.2 Fixed recursive structure for DCT-Ⅳ ………………………………28
3.3.3 Fixed recursive structure for DCT-Ⅱ …………………………………32
3.4 Selected and fixed coefficient recursive structures …………………………34
3.4.1 Selected and fixed recursive structure for DCT-Ⅲ ……………..…34
3.4.2 Selected and fixed recursive structure for DCT-Ⅳ ……………..…37
3.5 Recursive structure for MDCT and IMDCT..……………………………….39
3.6 Accuracy and complexity comparisons………….…………………………42
3.7 Conclusion ………………………………………………………………….48
4. RECURSIVE ARCHITECTURE FOR FORWARD AND INVERSE MODIFIED DISCRETE COSINE TRANSFORMS ..49
4.1 Motivation ……………………………………………….…..………….......49
4.2 Related work …………………………….………….……………………....50
4.3 Formulation of recursive MDCT …..…….………….….……………..……53
4.4 Formulation of IMDCT ……………………………………….…………..59
4.5 Implementation and discussion .…………………………………..………67
4.6 Conclusion ………………………………………………………………….67
5. HARDWARE IMPLEMENTATION OF The INVERSE MODIFIED DISCRETE COSINE TRANSFORM BY RECURSIVE STRUCTURE …………….…..………………69
5.1 Motivation …………………………………… ……… …….…..……….69
5.2 The description of IMDCT ………..……………...….…..….……………....70
5.3 Architecture design …………………………………………………….…....75
5.3.1 Pre-processing unit ….…………….………………………….…..……76
5.3.2 Filter banks unit …………………………………...……….……..……76
5.3.3 Post-processing unit ……………………………………………………78
5.4 VLSI implementation of IMDCT ………………………………..……….…79
5.4.1 Design flow ……………………..……………….………………….….79
5.4.2 Simulation result and chip features ………………………...…………..81
5.5 Summary …………….…………………………………………..………….85
6. CONCLUSIONS …………………………………………..…….…..………..86
6.1 Conclusion ………………………………………...…………………………86
6.2 Future work …………………………………………………………………..87
REFERENCES ……………………………… ……..…….………….………..…..88
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