臺灣博碩士論文加值系統

為了解決隱私與安全性的問題，並保障使用者之權益，釵h安全機制不斷地發展與改進，本論文乃設計符合高安全性、低複雜度與低成本之無線射頻標籤，且具有安全機制的弁遄C本論文所設計之無電池式標籤內部包含三大部份，分別為射頻前端電路、數位處理單元電路以及安全機制電路，而目前已經成戊]計出此三部份電路，其中無線射頻前端包含voltage multiplier、voltage regulator、bias circuit、Power On Reset (POR)、clock generator 和ASK modulator/demodulator，特別是本子計畫設計出一個使用ring oscillation機制而不需電容和電阻之被動元件的clock generator，並可產生出兩組所需要的時脈訊號，既可簡省晶片面積，亦能降低必v之消耗，在安全機制電路部分，我們採用高階加密標準之演算法去執行，採用一次處理8位元資料的架構去設計，可降低成本和減少消耗的必v。再者，本論文將提出創新之保密方法，此方法係利用增加時脈與訊號位元數來達到加密之幼纂A同時針對標籤內類比與數位電路提供雙重安全機制，以保護資料之隱私與安全性。

目錄

致謝 I
摘要 II
目錄 III
圖目錄 V
表目錄 VIII
第一章 緒論 1
1.1 研究動機 1
1.2 無線射頻辨識系統之應用 2
1.3無線射頻辨識系統應用頻段 3
第二章 無線射頻辨識系統之基本操作原理 4
2.1無線射頻辨識系統整體架構 4
2.2被動標籤操作機制描述 5
2.3調變方式 8
2.4 ANTI-COLLISION 8
2.5 BACKSCATTER 10
2.6 安全機制及個人隱私介紹 11
2.7 AES 原理介紹 13
2.7.1 AES的數學原理 14
2.7.2 SubByte 16
2.7.3 ShiftRow 17
2.7.4 MixColumn 18
2.7.5 AddRoundKey 19
第三章 被動標籤電路設計 22
3.1被動標籤整體架構 22
3.2微必v設計 23
3.3 RF FRONT END CIRCUITS 23
3.3.1 Voltage Multiplier 24
3.3.2 Voltage Regulator 25
3.3.3 Bias Circuit & Power On Reset 26
3.3.4 Clock Generator 27
3.3.5 ASK Modulator/Demodulator 28
3.4. SIGNAL PROCESSING UNIT 29
3.5 ADVANCED ENCRYPTION STANDARD (AES) 31
3.6 SIMULATION RESULTS 32
3.6.3 AES-128 模擬 38
第四章 電路實現與量測結果 44
第五章 結論與未來研究方向 47
參考文獻 48

[1] K. Finkenzeller, RFID Handbook：Radio-Frequency Identification Fundamentals and Applications, 2nd ed. New York: Wiley, 2003.
[2] U. Kaiser and W. Steinhagen, “ A low-power transponder IC for high-performance identification systems,” IEEE Journal of Solid State Circuits, vol. 30, no. 3, pp 306-310, March 1995.
[3] Zheng Zhu, Ben Jamali and Peter H. Cole, “ Brief comparison of different rectifier structures for HF and UHF RFID,” (Phase I Draft version 1.0) Auto-ID Lab, University of Adelaide, April 2004.
[4] http://rapidttp.co.za/transponder/taglayer.html
[5] K. V. S. Rao, “ An overview of backscattered radio frequency identification system (RFID),” Proc. of Microwave Conference, vol. 3 , pp. 746-749, Dec. 1999.
[6] K. Takaragi, M. Usami, R. Imura, R. Itsuki and T. Satoh, “ An ultra small individual recognition security chip,” IEEE Micro, vol. 21, no.6, pp. 43–49, 2001.
[7] A. Juels, RL Rivest, and M. Szydlo, “ The blocker tag: selective blocking of RFID tags for consumer privacy,” Proc. of 8th ACM Conference, pp. 103-111, May 2003.
[8] Juels and R. Pappu, “ Squealing euros: privacy protection in RFID-enabled banknotes,” Proc. of Fincancial Cryptography, vol. 2742, pp. 103-121, 2003.
[9] http://csrc.nist.gov/CryptoToolkit/aes/rijndael/Rijndael -ammen
ded.pdf
[10] A. I. A. Cunha, M.C Schneider and C. Galup-Montoro, “ An MOS transistor model for analog circuit design,” IEEE Journal of Solid State Circuits, vol. 33 , pp. 1510-1519, Oct. 1998.
[11] Y. Yao, Y. Shi and F. F. Dai, “ A novel low-power input-independent MOS AC/DC charge pump,” Proc. of IEEE ISCAS, vol. 1, pp. 380–383, May 2005.
[12] E. M. Camacho-Galeano, C. Galup-Montoro and M. C. Schneider, “ A 2-nW 1.1-V self-biased current reference in CMOS technology,” IEEE Transactions on Circuits and Systems II : Express Briefs, vol. 52, no. 2, pp. 61–65, Feb. 2005.

[13] H. Yu and K. Najafi, “Low-power interface circuits for bio-implantable microsystems,” Technical Digest of IEEE Int. Solid-State Circuits Conf. (ISSCC), vol. 1, pp. 194–204, Feb. 2003.

[14] O. T.-C. Chen and R.-B. Sheen, “A power-efficient wide-range phase-locked loop,” IEEE J. Solid-State Circuits, vol. 37, pp. 51–62, Jan. 2002.
[15] M. Morris Mano and Charles R. Kime, Logic And Computer Design Fundamentals, 3rd edition, New Jersey: Prentice Hall, 2003.
[16] M. Feldhofer, S. Dominikus and J. Wolkerstorfer, “Strong authentication for RFID systems using the AES algorithm,” Proc. of Workshop on Cryptographic Hardware and Embedded Systems (CHES), pp. 357–370, Aug. 2004.

[17] Meng-Lin Hsia, Yu-Sheng Tsai and Oscal T.-C. Chen, “An UHF passive RFID transponder using a low-power clock generator without passive components,” Proc. of IEEE 49th Midwest Symp. Circuits and Systems, Aug. 2006.