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研究生:黃道伸
研究生(外文):Dao-Shen Huang
論文名稱:射頻低雜訊放大器設計應用於全球衛星定位系統之研究
論文名稱(外文):Study on Radio Frequency Low Noise Amplifiers Design for Global Position System.
指導教授:孫台平
指導教授(外文):Tai-Ping Sun
學位類別:碩士
校院名稱:國立暨南國際大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2005
畢業學年度:93
語文別:中文
論文頁數:93
中文關鍵詞:低雜訊放大器全球衛星定位系統回授型態
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本研究的重點為全球衛星定位系統之前端電路設計,而主要著重在低雜訊放大器的設計。論文介紹基本的特性參數以及常見之射頻放大器電路架構,配合全球衛星定位系統之規格需求,設計一個以回授型態為主體架構之低雜訊放大器。使用回授型態的低雜訊放大器,對於外在溫度的影響可以獲得改善以及能夠提升前端電路的線性度。前端電路結構採用一個以高電子移動度電晶體的兩級回授型態低雜訊放大器,可以提供低雜訊指數以及足夠的功率增益,以便抑制後級頻段選擇濾波器所產生的雜訊,最後利用雙載子電晶體的元件特性設計一個單級回授型態低雜訊放大器,可提高有效功率增益,以滿足全球衛星定位系統之規格需求。在兩級回授型態低雜訊放大器中,模擬結果具有0.8 dB之低雜訊指數,18.96dB之有效功率增益,輸入與輸出電壓駐波比分別為1.55與1.52,輸入三階交會點位於-7.92 dBm,輸入增益1dB壓縮點位於-18.5 dBm。在單級回授型態低雜訊放大器中,模擬結果具有1.94 dB之低雜訊指數,16.5 dB之有效功率增益,輸入與輸出電壓駐波比分別為1.58與1.53,輸入三階交會點位於-6.16 dBm,輸入增益1dB壓縮點位於-21.5 dBm。而整體之前端電路模擬結果具有0.87 dB之低雜訊指數,33 dB之有效功率增益,輸入與輸出電壓駐波比分別為1.54與1.63,輸入三階交會點位於-23.5 dBm,輸入增益1dB壓縮點位於-32.5 dBm。前端電路在溫度變化-30度到85度之間,增益最高值與最低值的差異為1.1 dB,雜訊指數幾乎不變,線性度方面輸入三階交會點最高值與最低值的差異在1 dB以內。
This study is aimed to discuss the front circuit of Global Position System, especially in the design of Low Noise Amplifier. The research will introduce basic parameter and common RF circuit architecture. Feedback type of low noise amplifier is designed to meet the specification of Global Position System. Feedback type of low noise amplifier could lower the temperature influence as well as improve the linear degree of the front circuit. The front circuit adapts two stages of hetero-junction FET. Its function is to supply low noise figure so as to restrict the noise from the channel select filter. Finally, the characteristic of BJT is applied to design a single feedback type of low noise amplifier to improve available power gain and meet the specification of Global Position System. In two stages feedback of low noise amplifier, the noise figure of simulation is 0.8dB; available power gain is 18.96 dB; VSWR for input and output is 1.55 and1.52. Besides, IIP3 locates on –7.92 dBm and P1dB poses on -18.5 dBm. In Single feedback type of low noise amplifier, its simulation explains that the noise figure is 1.94 dB, 16.5dB for available power gain, 1.58 for Input VSWR, 1.53 for Output VSWR. IIP3 locates on -6.16 dBm. P1dB poses on-21.5 dBm. In general, the performance results of noise figure in front circuit is 0.87 dB. Available power gain is 33 dB. VSWR for input and output is 1.54 and 1.63.IIP3 locates on -23.53 dBm. P1dB poses on -32.5 dBm. The temperature variation range of front circuit is from -30 degree to 85 degree. The difference from the highest figure to the lowest figure is 1.1 dB. Noise Figure is fixed under some condition. In the aspect of the linear figure, the difference of IIP3 locates in the range of 1dB.
摘要 i
英文摘要 ii
誌謝 iii
目錄 iv
圖目錄 vi
表目錄 ix

第一章 緒論 1

1.1研究背景 1
1.1.1 全球衛星定位系統之起源 1
1.1.2 全球衛星定位系統之產業現狀與發展 1
1.2論文架構 2

第二章 全球衛星定位系統之接收器原理與架構 4

2.1全球衛星定位系統之接收器架構 4
2.1.1無線接收器架構 4
2.1.2全球衛星定位系統接收器架構 5
2.2全球衛星定位系統之接收器規格需求 7
2.2.1全球衛星定位系統之通訊技術 7
2.2.2全球衛星定位系統之衛星導航資料 7
2.2.3全球衛星定位系統之前端電路 8

第三章 雜訊與線性度之探討 12

3.1射頻電路中的雜訊 12
3.2雜訊指數 12
3.2.1雜訊因子 12
3.2.2等效雜訊溫度 13
3.2.3串接系統的雜訊指數 15
3.2.4有損電路的雜訊指數 17
3.3線性度的考量 20
3.3.1增益壓縮 21
3.3.2 交互調變失真 23
3.3.3三階交會點 25
3.3.4串接結構的交會點 29
3.3.5靈敏度 31
3.3.6動態範圍 32

第四章 低雜訊放大器之設計 35

4.1高頻放大器之討論 35
4.1.1放大器特性 35
4.1.2功率增益 36
4.1.3穩定度 37
4.1.4雜訊度 38
4.1.5阻抗轉換網路 40
4.1.6電壓駐波比 43
4.2低雜訊放大器之設計 44
4.2.1利用電阻器並聯之輸入匹配 45
4.2.2利用轉導值之輸入匹配 46
4.2.3利用負回授之輸入匹配 47
4.2.4利用電感器作為源極衰減之輸入匹配 50
4.3全球衛星定位系統之前端電路設計 51
4.3.1雜訊參數 52
4.3.2回授型放大電路 53
4.3.3低雜訊放大器設計流程 56
4.4高頻電晶體之選擇 57

第五章 結果與討論 62

5.1單級低雜訊放大器 62
5.2兩級低雜訊放大器 68
5.3全球衛星定位系統前端電路之比較 73
5.4全球衛星定位系統前端電路之討論 77

第六章 結論與展望 87

參考文獻 89

附錄A NE34018 Datasheet 92
附錄B BPF405 Datasheet 93
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