臺灣博碩士論文加值系統

在深次微米半導體製程技術之下，由於任兩條導線之間皆會存在大量耦合電容，許多用來減少導線自我轉換機率(self-transition activities)，耦合轉換機率(Coupling-transition activities)，或是減少最差情況下的串音延遲(worst-case crosstalk delay)的匯流排編碼技術相繼被提出。 然而先前的研究指出在相同的導線間距(wire pitch)下，這些方法對於減輕晶片的功率消耗並無實質的幫助。 故本論文將不止從功耗的觀點，也會從時脈延遲與編/解碼器的額外負擔來重新評估匯流排編碼技術之優劣。 本論文將著重在那些使用較多資源以去除最差情況下的耦合延遲(worst-case crosstalk delay)之匯流排編碼技術。 本論文的實驗將立基於各編碼方式之匯流排繞線面積皆相同的前提之下。 為了確保實驗的公平性，本論文也會提出一個能求出在固定的導線間距(wire pitch)下能使延遲最佳化之導線寬度(wire width)的方法。 為了確保串音延遲能精確的被反映在被侵略之電路之上，我們也將根據各種不同匯流排編碼技術所擁有串音屏蔽能力修改電路模型以用來精確模擬出電路之串音延遲。 根據本論文的實驗結果，我們發現在使用相同的繞線面積前提之下，針對晶片上匯流排的編碼皆無法獲得實質利益。 本論文也顯示出若是以使用相同的導線間距與導線寬度為前提，實驗將會有不同的結論。

Due to the presence of significant capacitive coupling between two adjacent lines in deep submicron process technologies, many bus encoding methods have been proposed to reduce self-transition activities, coupling-transition activities, or worst-case crosstalk delay. However these methods were shown not viable for energy reduction based on same wire-pitch assumption. In this thesis, we revisit this issue not only from the energy but also from the delay and codec overhead perspectives. We focus on the methods employing many redundant lines for eliminating crosstalk delay. Our study is made based on that all encoded buses use the same routing area. To guarantee a fair comparison, we propose a simple method to find the wire width that achieves minimal delay for a given wire pitch. We also tailor the circuit model for each encoded bus in terms of its crosstalk avoidance capability so that the noise induced delay can manifests itself on a victim wire. Our analysis shows that all investigated methods including those using more redundant wires for crosstalk avoidance are not viable for an on-chip bus from all perspectives. It also shows that a wrong conclusion would be made if our study is made based on same wire-pitch premise.

Chapter 1. Introduction
1.1. MOTIVATION
1.2. SCOPE OF THE WORK
1.3. RESEARCH CONTRIBUTION
1.4. THESIS ORGANIZATION
Chapter 2. Related Work
2.1. BUS ENERGY MODEL
2.2. BUS DELAY MODEL
2.3. BUS ENCODING METHODS
2.3.1. Bus-Invert
2.3.2. Odd/Even Bus-Invert
2.3.3. Low Energy Set Scheme (LESS)
2.3.4. LPS
2.3.5. Clique
2.3.6. NAT
2.3.7. TCODE
2.3.8. Summary
Chapter 3. Methodologies
3.1. TRANSITION ACTIVITY
3.2. DELAY OF CODEC AND BUS
3.3. ENERGY DISSIPATION OF CODEC AND BUS
3.4. AREA OF CODEC
3.5. PEAK NOISE OF BUS
Chapter 4. Experimental Results
4.1. ENCODED BUSES USING SAME ROUTING RESOURCE
4.2. ENCODED BUSES USING SAME WIRE PITCH AND WIDTH
Chapter 5. Conclusions
References

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