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Hot-carrier injection induced device reliability has been a
major concernin modern flash memory device design. Most of the
reliability studies on flash memory have been paid on n-channel
cell structure, quite few deal withthe reliability of a p-
channel cell. In this thesis, we have made a comparative study
of the p-channel flash cell reliability by studying its
programming characteristics with different schemes which include
channel hotelectron injection (CHEI) and band-to-band (BTB)
induced hot electron injection operating schemes. Next, we
studied the hot-electron stress inducedreliability problem
during program operation. These reliability problems aredue to
the generation of interface state and oxide trap charge. The
profilingof these two oxide damages has played a major part for
the study of flash memory reliability issues. In this work,
first we use a simple and accurateprofiling technique to
determine the lateral distribution of stress induced interface
state and oxide charge in two programming bias conditions. Based
onthe extracted profiles of interface state and oxide trap
charge, the degradation mechanisms of flash memories can be
understood more clearly.Afterthe stress of flash memories at the
programming bias, we observed that the oxide damages will
retard the programming characteristics seriously and alsofound
that interface state generation is the dominant mechanism for
the delayof programming speed. Besides, the scheme of optimum
BTB program bias voltagefor achieving better reliability has
been studied. We found that the lower the drain voltage for BTB
programming, the better the device performance. Finally, the
reliability of p-channel flash memories during programming
operation has also been discussed.
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