臺灣博碩士論文加值系統

本論文提出一個多差動輸出差動輸入轉導電容濾波器(Multiple-Output Differential-Input Operational Transconductance Amplifier-C Filter, MODI OTA-C Filter），主要應用於近身端心電訊號擷取裝置。為減少濾波器係數對於製程、電壓以及溫度變異之靈敏度以及訊號失真的影響，濾波器組態採用五階巴特沃茲低通濾波器。為滿足生醫系統所需低功耗與高解析度需求，此研究採用連續時間OTA-C架構來實現類比濾波器，透過將運算轉導放大器操作於弱反轉區，以達到低功率消耗的目的，此外，為了簡化近身端系統架構及提高電路之線性度，此低功率濾波器提出一多差動輸出差動輸入電路，將過去文獻之OTA架構中使用電流分流技術之電流設計為另一差動輸出對，並保有原先降低轉導值之特性，而將整體電流重新分配後，可設計出二組輸出轉導值相同之輸出差動對。將此多差動輸出差動輸入運算轉導放大器配合系統簡化技巧，可將原本五階轉導電容式低通濾波器所需之運算轉導放大器個數由11個降至6個，直接減少了硬體成本與功率消耗，並提高整個濾波器的線性度(此架構在2015/2016年分別取得美國與中華民國發明專利、架構與電路實現測試在今年四月被IEEE TCAS II接受)，量測結果且考量功率消耗與動態範圍已證明具有全世界較佳的技術指標(Figure of Merit, FOM)。不過經由電路雜訊分析，此種多差動輸出差動輸入運算轉導放大器所產生之雜訊較傳統運算轉導放大器架構大，並限制整個類比前端電路之訊號雜訊比(Signal-to-Noise Ratio, SNR)，為了在不使用大電容減少濾波器雜訊考量下，我們引用了阻抗縮放電路(Impedance Scaler Circuit)技術，進一步提升類比濾波器的性能(已完成量測與論文撰寫，並投稿IEEE TBioCAS期刊)，相較於前一版本(2017/4 accepted by IEEE TCAS II)，技術指標可再進一步提升一個階數(order)。此晶片已由TSMC 0.18μm製程製作並量測，其核心面積為0.135 mm2。由量測結果顯示，在供應電壓1 V下，其功率消耗為390 nW，動態範圍為58.44 dB；當差動輸入訊號振幅為100 mV時，其總諧波失真低於-59 dB，而頻寬量測結果為250 Hz可以濾除心電訊號以外的雜訊干擾。

This study proposes a fifth-order Butterworth operational transconductance amplifier-C (OTA-C) low-pass filter (LPF) with multiple-output differential-input (MODI) OTA structure and metal–insulator–metal capacitors for electrocardiography applications. The current division technology is used as an alternative output pair to provide multiple outputs and achieve high linearity. This technique reduces the number of OTAs of the fifth-order LPF from 11 to 6 as compared with the conventional structure. The design issue of linearity and noise are also considered in the implementation of LPF. In order to achieve a filter with large-time constant and low noise, linearized MODI OTA structures with reduced transconductance and impedance scaler circuits for capacitors are used. OTA-based circuits is operated in the subthreshold region and supply voltage of 1V to conserve power consumption due to the battery life of the portable device and the critical area of the digital processor required in the circuit. The proposed filter is fabricated in a 0.18 µm complementary metal–oxide–semiconductor technology with a core area of 0.135 mm2. The experimental results show that the dynamic range (DR) is 58.44 dB, achieved a total harmonic distortion (THD) of -59 dB under a bandwidth of 250 Hz and input voltage of 100 mV at a 1 V supply voltage. The total power dissipation is 390 nW.

摘要 I
誌謝 IX
章節目錄 X
表目錄 XII
圖目錄 XIII
第一章　簡介 1
1.1 研究動機 1
1.2 類比前端系統 3
1.3 章節架構 7
第二章 濾波器之理論與設計 8
2.1 濾波器之規格制訂 8
2.1.1　濾波器之組態 8
2.1.2　總諧波失真 8
2.1.3　訊號雜訊比 9
2.1.4　訊號雜訊與失真比 9
2.1.5　動態範圍 9
2.2　五階電感電容梯型低通濾波器 11
2.3　訊號流程圖 12
2.4　頻率增縮以及解正規化 15
第三章 轉導電容濾波器之元件替換 18
3.1 積分器架構之選擇 18
3.2 運算轉導放大器以及其非理想效應 20
3.2.1　有限增益與非線性轉導值之效應 21
3.2.2　雜訊之效應 23
3.2.3　寄生電容效應 24
3.3 被動元件之替換 25
3.3.1 被動電阻之替換 25
3.3.2 被動電感之替換 26
3.4 元件替換以及元件值實現 30
3.5 轉導電容濾波器之硬體簡化 34
3.5.1　MIDO OTA 35
3.5.2　MODI OTA 35
第四章 五階轉導電容低通濾波器實現 40
4.1 弱反轉區(Weak Inversion) 40
4.1.1 弱反轉區之特性探討 40
4.2 運算轉導放大器技術 46
4.2.1 低轉導值OTA實現與相關技術 46
4.2.2 線性化相關技術 49
4.3 電路設計與模擬 53
4.3.1　運算轉導放大器電路設計 53
4.3.2　電路模擬 64
4.4　阻抗增縮電路設計 75
4.5　共模回授電路 79
4.6　佈局考量與模擬結果 81
4.5.1　佈局考量 81
4.5.2　模擬結果 84
第五章　量測結果、環境與考量 89
5.1 量測環境的建立 89
5.1.1　量測環境 90
5.1.2　單端轉雙端(Single-to-Differential)電路 93
5.1.3　緩衝器(Buffer) 94
5.2 實驗結果 95
5.2.1　頻率響應 97
5.2.2　暫態響應 99
5.2.3　頻譜分析 100
5.2.4　輸出參考雜訊 101
5.2.5　動態範圍及不同頻率下THD之量測 102
5.3　相關文獻規格比較 103
第六章　結論與展望 104
參考文獻 105

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