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研究生:陳信勇
研究生(外文):Shin-Young Chen
論文名稱:應用通用差異係數法之有效率的FIR架構設計
論文名稱(外文):Generalized DCM Approach for Cost-efficient FIR Filter Strcuture
指導教授:吳安宇吳安宇引用關係
指導教授(外文):An-Yeu Wu
學位類別:碩士
校院名稱:國立中央大學
系所名稱:電機工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:1999
畢業學年度:87
語文別:英文
論文頁數:57
中文關鍵詞:有限脈衝響應濾波器、差異係數法、通用差異係數法、差異因子
外文關鍵詞:FIR filter、DCM、GDCM、differential factor
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  • 被引用被引用:0
  • 點閱點閱:256
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  • 收藏至我的研究室書目清單書目收藏:1
有限脈衝響應濾波器在數位信號處理中是一個重要的模組。然而,有限脈衝響應濾波器在超大型積體電路實現上,通常需要較大的面積,尤其是在具有較高階數和較長字元長度的情況下。我們應用一種稱為差異係數法。此方法主要觀點是將濾波器兩兩相鄰的係數取其差異值,發現所得到的濾波器係數能用較短的字元長度來表示,因此,硬體複雜度得以減少。
在這篇論文中,我們將上述的差異係數法加以延伸,提出一種有效率且通用的差異係數技巧。我們將其命名為通用差異係數法。在通用差異係數法中,我們提供具有廣泛的方法,尋找最佳化的差異係數法濾波器所需的參數,在要求的信號雜訊比下,減少更多的硬體複雜度,並能消除在有限字元長度下,傳統差異係數法的數值不穩定的現象。傳統差異係數法只適用於低通濾波器,這個新的方法能應用於各種不同的有限脈衝響應濾波器種類(如低通、高通、帶通等)。
根據論文提出的通用差異係數法,我們將發展一套電腦輔助設計工具。它能針對一個給定的脈衝響應和訊號量化雜訊比而自動地產生最佳化的設計結果。經由此電腦輔助設計工具,系統晶片設計者能夠輕易地得到最佳化的差異係數法濾波器參數,用來節省硬體所需要的晶片面積及消耗功率。

Finite Impulse Response (FIR) filter is the key functional block in the area of digital signal processing (DSP). In the VLSI implementation, the hardware complexity of the FIR filter is directly proportionately to the tap length, N, and the wordlength, W. To reduce the hardware cost, we can employ the well-known scheme, Differential coef-ficient Method (DCM). The key concept of the DCM is to shorten the required the wordlength, W, without changing the SQNR of original FIR filter. This can be achieved by exploring the characteristics of the FIR filter coefficients.
In this thesis, we propose a more efficient and versatile scheme based on the DCM scheme. We call it Generalized Differential coefficient Method (GDCM). Basically, the GDCM can provide more degrees of freedom in searching the optimal DCM-based design parameters. Compared with the conventional DCM, the proposed GDCM can not only reduce hardware complexity but also retain the required SQNR. It can also elimi-nate the numerical unstability that is encountered in the conventional DCM scheme. Moreover, unlike conventional DCM, which can only be used in low-pass FIR filter, we can apply the proposed GDCM to various types of FIR filters, such as low-pass FIR filter, high-pass FIR filter, band-pass FIR filter and band-stop FIR filter. A correspond-ing design methodology is developed so as to facilitate the cost-efficient VLSI imple-mentation of FIR filters in a systematic manner.
Based on the derived design methodology, we also develop a CAD tool, which can generate the optimum solutions automatically for a given impulse response and the pre-defined Signal-to-Quantization-Noise Ratio (SQNR). As a result, the designer can easily apply the GDCM to save silicon complexity by using the developed CAD tool.

Chapter 1 Introduction1
1.1 Background 1
1.2 Motivation and Goal3
1.3 Thesis Organization4
Chapter 2 Differential Coefficient Method6
2.1 The 1st-order DCM6
2.2 The mth-order DCM8
2.3 Summary 12
Chapter 3 The Modified DCM (MDCM)13
3.1 The 1st-order Modified DCM13
3.2 Frequency Domain Viewpoint of MDCM15
3.3 The mth-order Modified DCM17
Chapter 4 The Generalized DCM-based FIR Filter21
4.1 The Generalized DCM21
4.2 The GDCM for High-pass FIR Filter24
4.3 GDCM for Band-pass FIR filter27
4.4 GDCM for Band-Stop FIR Filter30
4.5 The mth-step GDCM-Based on FIR Filter32
Chapter 5 Simulation and Analysis of FIR Filter based on GDCM34
5.1 Coefficient Range of FIR using GDCM34
5.2 Coefficient Quantization Analysis37
5.2.1 The Coefficient Quantization Error on GDCM38
5.2.2 The SQNR of Coefficient Quantization Error41
5.2.3 The Scaling Factor of GDCM and DCM41
5.3 Rounding Error Analysis43
5.4 Hardware Complexity Model45
Chapter 6 CAD Tool for optimal fixed-point VLSI implementation46
6.1 CAD Tool Flowchart46
6.2 CAD Tool Example49
6.2.1 The Low-pass FIR Filter Example49
6.2.2 The High-pass FIR Filter Example51
6.2.3 The Band-pass FIR Filter Example52
6.2.4 The Band-stop FIR Filter Example53
6.3 Verilog Simulation54
Chapter 7 Conclusions55
References:57

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[2] H. Samueli, “An Improved Search Algorithm for the Design of Multiplierless FIR Filters with Power-of-Two Coefficients,” IEEE Trans. Circuits Syst., vol. 36, pp. 1044-1047, July 1989.
[3] C. K. Chen and J. H. Lee, “Design of Linear-Phase Quadrature Mirror Filters with Power-of-Two Coefficients,” IEEE Trans. Circuits Syst. I, vol. 41, pp. 445-456, July 1994.
[4] Y. C. Lim and S. R. Parker, “FIR Filter Design Over a Discrete Powers-of-Two Co-efficient Space,” IEEE Trans. Acoust., Speech, and Signal Processing, vol. 31, no. 3, pp. 583-591, June 1983.
[5] Kenji Nakayama, “Permuted Differential coefficient Realization of FIR Digital Fil-ters,” IEEE Trans. Acoust., Speech, and Signal processing, vol. 30, no. 2, pp. 269-278, April 1982.
[6] S. A. White, “Applications of Distributed Arithmetic to Digital Signal Processing: A Tutorial Review,” IEEE ASSP Magazine, pp.4-19, July 1989.
[7] N Sankarayya, K. Roy, and D. Bhattacharya, “Algorithms for Low Power and High Speed FIR Filter Realization Using Differential Coefficients,” IEEE Trans. Cir-cuits Syst., vol. 44. no.6, pp.488-497, June 1997.
[8] T. S. Chang and C. W. Jen, “Low Power FIR Filter Realization with Differential coefficient and Input,” in Proc. of IEEE Int. Conf. Acoustics, Speech and Signal Processing, 1998, pp. 3009-3012.
[9] E. C. Ifeachor and B. W. Jervis, Digital Signal Processing- A practical Approach. Addison Wesley: 1993.
[10] M. Mehendale, S. B. Roy, S. D. Sherlekar, and G. Venkatesh, “Coefficient Trans-formations for Area-Efficient Implementation of Multiplierless FIR Filters,” in Proc. of Eleventh Int. Conf. on VLSI Design 1997, pp. 110-115.
[11] A. Y. Wu, and K. F. Hwang, “Optimal Fixed-Point VLSI Structure of a Floating-point Based Filter Design,” in Proc. IEEE Int. Symp. Circuits and Systems, Mon-terey, 1998, pp.V.375-378.
[12] Andreas Antoniou, Digital Filters Analysis, Design, and Applications. Second Edition, McGraw-Hill International Editions, 1993.

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