臺灣博碩士論文加值系統

可以讀寫的不揮發性記憶體、快閃記憶體，到目前為止被採用在個人電腦、行動電話、衛星導航系統等等的程式儲存用途上。最近，做為數位相機的資料記錄用卡片的需求正擴大之中。那麼探討快閃記憶體的未來，似乎作為沒有裝載音頻機器(並非指家庭用的小型音響，而是指攜帶型的頭載式耳機音響)，硬碟的PDA等等的記錄用記憶體的需求增加，將是可以期待的。現在，流通在市場上的音頻機器及硬碟，必須要有磁帶轉動或磁碟轉動的驅動部分。可是，如果採用了快閃記憶體，那麼驅動部分就不需要了。如果不需要驅動部分的話，就不會受到機器尺寸的限制，就可以極端的進行小型化的工作。此一行進方向，組裝了快閃記憶體的系統LSI元件將會開創出另一條路來。

Recently, due to the semiconductor element fabrication technology has developed very rapid in flash memory technology. It has been widely employed in non-volatile semiconductor memories such as: IC card、hand-held Computer、Cameras and so on. The flash memory to act for hard disk drives for data storage must meet the requirement of small size, and low power consumption. For an advanced flash memory, the professor will focus on studying the threshold voltage shift, data retention time, P/E endurance, programming efficiency, erase speed, and so on. The flash memory can obtain higher device reliability, high performance, and integrity.
The ULSI application goes on processing faster and voltage supply is trending lower, the more strictly to the technology of flash memory process. Since flash memory technology base on the localized oxidation isolation method (LOCOS) process technology can meet today's high-density requirement. Because of the conventional LOCOS isolation process has a problem known as “bird's beak encroachment”. Therefore, the scalability of the LOCOS is limited to about the um range. To increase the device integration level, different isolation techniques are required. Therefore, when considering the embedded requirement of future SOC (System On Chip) applications a low power flash cell with STI process module become must be.
In recent years, it has been expected that STI process will improve both density and integration when compare to LOCOS process; but the local high stress electric field on STI edge will result in SILC (Stress Induced Leakage Current), which degrade the characteristics of data retention. In this thesis, we will investigate flash memory characteristics, which include hot carrier related issues, such as oxide damage, write/erase cycles endurance, read disturbance, data retention and so on in self-aligned flash memory cells and improvement.

ABSTRACT IN CHINESE....................................iii
ABSTRACT IN ENGLISH....................................iv
ACKNOWLEDGEMENT........................................vi
LIST OF FIGURES........................................ix
CHAPTER 1...............................................1
INTRODUCTION............................................1
1.1 History of the flash memory.........................1
CHAPTER 2...............................................9
BASICS OF NONVOLATILE SEMICONDUCTOR MEMORY..............9
2.1 Basic structure.....................................9
2.2 Carrier transport scheme...........................15
2.3 Operating conditions...............................20
2.3.1 Read.............................................21
2.3.2 Program..........................................21
2.3.3 Erase............................................21
2.4 Yield and reliability..............................30
2.4.1 Retention........................................21
2.4.2 Endurance........................................21
2.4.3 Reading Disturbs.................................21
2.4.4 Programming Disturbs.............................21
CHAPTER 3..............................................40
CHARACTERISTICS OF FLOATING GATE FLASH DEVICES.........40
3.1 Basics of program and erase operations.............40
3.1.1 Channel Hot-Electron (CHE) Programming...........21
3.1.2. Source-Side Hot-Electron Programming............21
3.1.3. Fowler-Nordheim (F-N) Tunneling.................21
3.1.4. Tunnel Erase Through Thin Oxide.................21
3.1.5. Tunnel Erase Through Poly-to-Poly Oxide.........21
3.2 Flash memory with FN tunnel program and erase......43
3.2.1 The DINOR Cell...................................21
3.2.1.1 Cell Structure.................................21
3.2.1.2. Program/Erase Operation.......................21
3.2.1.3. Disturb and Endurance Characteristics.........21
3.2.1.4. Virtual Ground DINOR..........................21
3.3 GROUNDED-GATE DRAIN-ERASE-INDUCED CELL DEGRADATION.21
3.3.1 Band-to-Band Tunneling Generated Hot-Holes.......21
3.3.2 Avalanche Breakdown-Induced Cell Wearout.........21
3.3.3. Reduction Of Hot-Hole Injection.................21
3.3.3.1. Double-Diffused Junction......................21
3.3.3.2. Reduction Of Applied Drain Voltage............21
3.3.3.3. Negative Gate, Floating Gate To Drain Erase...21
3.3.4 Stress-Induced Oxide Leakage.....................21
CHAPTER 4..............................................57
RESULTS AND DISCUSSION.................................57
4.1 DIRNOR Program/Erase Endurance.....................57
4.2 Data Retention Analysis............................58
CHAPTER 5..............................................62
CONCLUSIONS............................................62
REFERENCE..............................................63

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