臺灣博碩士論文加值系統

車牌偵測系統可應用於許多不同的系統，例如車牌辯識系統、前車距離估測系統。前車距離估測系統可以協助司機的安全，屬於進階安全輔助系統（Advanced Driver Assist Systems）中的一項。為了安全考量，系統必須穩定不受環境干擾，並且要能夠即時反應（real-time）。因此，目前發展了許多複雜的演算法來克服外在干擾，但也因為演算法複雜度日與漸增，目前的前車距離估測系統大多是利用電腦或是嵌入式系統來實作。
本論文提出一個以純硬體的數位電路來實現車牌偵測系統，最後應用於前車距離估測系統，在這系統中主要分為五個步驟：（1）影像裁切，（2）雜訊去除，（3）影像標籤，（4）提取車牌特徵，（5）車牌定位。將這些步驟以模組化方式設計成硬體電路，此系統使用Verilog硬體描述語言(Hardware Description Language)以純硬體的方式設計，最後在Altera DE2-70多媒體開發平台上實現。
實驗結果顯示此系統使用了36,782個邏輯元件（logic elements，LEs），其中，除了輸入與輸出模組外，不需要任何的SDRAM來儲存影像資料，取而代之的是1條的line buffer（320×1）與暫存器來完成系統，藉此來降低系統成本。在一般條件下車牌偵測率高達98.4%，若是加入隧道、下雨等實際應用會遇到的環境干擾，偵測率可達83%，且實際處理速度為每秒達30張影像（NTSC Input），達到了高偵測率且即時的車牌偵測系統。

License plate detection system is a key technology in many applications such as license plate recognition, and front vehicle distance estimation system. Front vehicle distance estimation system can assist drivers’ safety. The system which is designed to assist drivers’ safety is called Advanced Driver Assist Systems (ADAS). For safety reason, it must be stable and real-time. Many algorithms are developed to overcome environment variation. However, the more complex algorithms are, the more difficult to implement on hardware. Up to now, most of the front vehicle distance systems are implemented on PC or embedded system.
In this thesis, we proposed a real-time license plate detection system based on hardware design to enhance the processing time and apply to front vehicle distance estimation system. There are five basic steps in our processing system: (1) Image cropping, (2) Noise removal, (3) Labeling, (4) License plate feature extraction, (5) Localization. Each step is designed by hardware circuit module written in Verilog HDL. Finally, the proposed hardware architecture is implemented on Altera DE2-70 development board to verify the feasibility of our hardware design.
To implement our system requires 36,782 logic elements. Except for input and output modules, no more SDRAM is needed to store the image data. Instead of large amount of SDRAM, only one line buffer (320x1) and several registers are required in our design. Thus, the cost of our implementation can be reduced. It can operation in real-time at a frame rate of 30fps. The experimental result shows our proposed license plate detection architecture attains a real-time reliable system with a high detection rate 98.4% in general environment and 83% in most of environments.

誌謝 I
摘要 II
Abstract III
目錄 IV
圖目錄 VII
表目錄 X
第一章 緒論 1
1.1 研究動機 1
1.2 相關研究 2
1.3 研究方法 3
1.4 論文組織 3
第二章 開發環境與系統架構 5
2.1 開發環境 5
2.1.1 演算法驗證環境 5
2.1.2 FPGA驗證環境 6
2.2 系統架構 6
2.2.1 攝影機介紹 7
2.2.2 DE2-70開發平台 8
2.2.3 NTSC視訊標準介紹 9
2.2.4 視訊解碼晶片簡介（ADV7180） 10
2.2.5 ITU-R BT.656規格 11
2.2.6 色彩取樣 14
2.2.7 VGA轉換晶片（ADV7123） 15
第三章 車牌偵測系統與前車距離估測 16
3.1 影像裁切 17
3.2 雜訊去除 18
3.3 影像標籤 19
3.3.1 利用灰階值差異進行影像標籤 20
3.3.2 利用垂直邊特徵進行條件式影像標籤 21
3.3.3 原始影像標籤與條件式影像標籤比較 22
3.3.4 條件式影像標籤硬體電路設計 23
3.4 提取車牌特徵 24
3.4.1 提取車牌特徵演算法 24
3.4.2 改良式提取車牌特徵演算法 25
3.4.3 改良式提取車牌特徵演算法硬體電路設計 26
3.5 車牌定位 27
3.6 前車距離估測 32
第四章 實驗結果與效能分析 34
4.1 演算法驗證 34
4.1.1 影像序列一之驗證結果 35
4.1.2 影像序列二之驗證結果 36
4.1.3 影像序列三之驗證結果 39
4.1.4 影像序列四之驗證結果 41
4.1.5 影像序列五之驗證結果 43
4.2 DE2-70開發平台驗證與效能分析 45
4.2.1 DE2-70開發平台驗證結果 45
4.2.2 距離估測誤差分析 47
4.2.3 FPGA硬體資源使用情況 48
4.2.4 系統Latency與功耗分析 49
4.3 近期研究比較 50
第五章 結論與未來研究方向 51
5.1 結論 51
5.2 未來研究方向 51
參考文獻 52
作者簡介 54

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