臺灣博碩士論文加值系統

本論文涵蓋兩個研究方向，第一部分是針對在 V 頻帶之正交調變器 (I/Q modulator) 的設計分別提出被動元件的改良以及一個嶄新的方法來改善正交不匹
配性 (I/Q mismatch) 。而另一部份將探討有關在次毫米波 (sub-millimeter-wave) 功率放大器 (power amplifier) 之設計方法。
首先，第一部分呈現了一個實現於台積電 90 奈米金氧半場效電晶體 (CMOS) 製程之 V 頻帶寬頻正交調變器。為了改善於設計正交耦合器時所產生的正交不匹配性，我們使用了一個具有低振幅且相位不匹配以及對端點阻抗低敏感特性之共平面波導指叉式耦合器 (CPW interdigitated coupler) 。同時，藉由修改傳統馬遜式平衡與不平衡轉換器 (Marchand-type balun) 之接地平面結構，本地振盪源的漏流效應 (LO leakage) 也得到良好的抑制。另一個使用穩茂 0.15 微米假晶式高電子遷移率電晶體 (pHEMT) 製程之正交調變器引入了一個名為功率鎖定迴路 (power-locked loop) 系統之新穎的功率校正方法來達到寬頻的鏡像訊號抑制 (sideband suppression) 。此功率鎖定迴路系統運用了回授機制使正交不匹配性得以自動化調整，同時也克服了傳統耦合器在頻寬上的限制。上述兩個 V 頻帶之正交調變器分別呈現了大於 28 與 35 dBc 鏡像抑制率並擁用大於 17 GHz 的頻寬。此外，降低正交不匹配性對於整體系統向量強度錯誤率 (error vector magnitude, EVM) 的貢獻也經由高達 7 Gb/s 之高速傳輸實驗得到驗證。
此論文的第二部分闡述了一個異於傳統阻抗轉換的電路架構，並成功經由一個實現於台積電 65 奈米金氧半場效電晶體製程之 D 頻帶功率放大器驗證。作者於此提出的阻抗轉換網路可同時具備阻抗匹配以及功率結合的功能，並提供了多路功率結合的方法，目的在於提高整體輸出功率與提升效率。而多路功率結合產生的高阻抗傳換比在提出的阻抗轉換網路中也可解決，其結果可由大於 30 GHz 的小訊號頻寬來驗證。且因免除了額外的功率結合架構，此操作於 150 GHz 頻段之功率放大器於一小晶片面積內實現了大於 12 dBm 的飽和功率與 12% 的功率附加效率 (power-added efficiency, PAE)。

This thesis is composed of two main researches. The first part is the investigations on two V-band I/Q modulators including the improvements on passive components and a creative method to enhance the I/Q balance, and the other part is the design topic about sub-millimeter-wave power amplifier.
The first part starts with a V-band wideband I/Q modulator implemented in TSMC 90-nm CMOS process. In order to improve the I/Q mismatch in the design of quadrature phase, a co-planar waveguide (CPW) interdigitated coupler with low amplitude and phase imbalances and insusceptibility to port impedance is employed. The LO leakage is also effectively mitigated by revising the conventional Marchand-type baluns with incomplete ground plane. Another I/Q modulator fabricated in WIN’s 0.15-um pHEMT technology features wideband sideband suppression ratio with the novel power-level calibration method, power-locked loop system. A feedback mechanism is introduced to improve I/Q mismatch automatically and also overcomes the bandwidth restriction on conventional couplers. The two proposed I/Q modulators demonstrate lower than -28 and -35 dBc sideband suppression ratio, respectively, with wider than 17 GHz bandwidth. Moreover, the capability to minimize the I/Q mismatch contribution to system error vector magnitude (EVM) is verified by 7 Gb/s high speed transmission experiments.
The second part presents the proposed impedance transformation network exemplified by a D-band power amplifier in TSMC 65-nm CMOS. In order to increase the output power and enhance the efficiency, the impedance transformation network integrates matching and power combining network simultaneously and also provides the solution of multi-ways power combining. The large impedance transformation ratio resulting from multi-way power combining can also be resolved in the procedure of proposed impedance transformation network. This can be verified by the small signal bandwidth of wider than 30 GHz. Furthermore, without additional power combining structures, higher than 12 dBm saturation power and 12 % power-added efficiency (PAE) are achieved with a compact chip size around 150 GHz.

口試委員會審定書 #
誌謝 i
中文摘要 iii
ABSTRACT v
CONTENTS vii
LIST OF FIGURES xi
LIST OF TABLES xxi
Chapter 1 Introduction 1
1.1 Background and Motivation 1
1.2 Literature Survey 3
1.2.1 MMW I/Q Modulator 3
1.2.2 D-band Power Amplifier 6
1.3 Contributions 8
1.4 Thesis Organization 10
Chapter 2 Design of High Sideband Suppression Ratio I/Q Modulators and Demodulators 11
2.1 Digital Modulation 11
2.1.1 Phase Shift Keying (PSK) 11
2.1.2 Frequency Shift Keying (FSK) 12
2.1.3 Quadrature Amplitude Modulation (QAM) 13
2.1.4 Orthogonal Frequency-division Multiplexing (OFDM) 14
2.1.5 Intersymbol Interference (ISI) 17
2.1.6 Error Vector Magnitude (EVM) on Constellation Diagram 18
2.2 Basic of I/Q Modulator and Demodulator 21
2.2.1 I/Q modulator and demodulator used in direct-conversion system 21
2.2.2 Operational principle of I/Q Modulator and Demodulator 22
2.2.3 I/Q Impairment on EVM performance 26
2.2.4 Sideband suppression of I/Q modulator 29
2.3 Design of V-band CMOS Broadband High Sideband Suppression Ratio I/Q Modulator adopting Improved Marchand-type Balun and CPW Quadrature Coupler 32
2.3.1 Introduction 32
2.3.2 Modulator Architecture 32
2.3.3 Circuit Design 33
2.3.3.1 Process Description 33
2.3.3.2 Gilbert-cell Mixer 35
2.3.3.3 Improved Marchand-type Balun 44
2.3.3.4 CPW Quadrature Coupler 46
2.3.3.5 I/Q Modulator Performances 51
2.3.4 Experimental Results 53
2.3.5 Discussions 60
2.3.5.1 Analysis of Balun Mismatch Effect on Modulator Performance 60
2.3.5.2 Comparison between CPW Quadrature Coupler and Conventional Quadrature Coupler 69
2.3.6 Performance Summary 76
2.4 Design of V-Band High Data Rate Modulator and Demodulator with Power-Locked Loop LO Source in 0.15-um GaAs pHEMT Technology 77
2.4.1 Introduction 77
2.4.2 Concept of Power-Locked Loop System 77
2.4.3 System Architecture 79
2.4.4 Sub-circuit Design 81
2.4.4.1 Power Budget Calculation 81
2.4.4.2 Sub-harmonically Pumped (SHP) Mixer 83
2.4.4.3 Amplitude Detector 83
2.4.4.4 Buffer Amplifier 84
2.4.4.5 Phase-shifter 85
2.4.4.6 Attenuator 86
2.4.4.7 Operational Amplifier 87
2.4.4.8 Feedback Stability Study 88
2.4.5 Measured Results 91
2.4.5.1 Modulator characteristics 93
2.4.5.2 Demodulator characteristics 100
2.4.6 Discussions 111
2.4.6.1 Limitations of the work 111
2.4.6.2 Discrepancy in the phase-controlled voltage and feedback voltage 112
2.4.6.3 Improvement of 2LO leakage in the sub-harmonic I/Q modulator 114
2.4.6.4 2LO leakage influence on high-speed transmission quality 117
2.4.7 Performance Summary 120
2.5 Summary of Two V-band I/Q Modulators 124
Chapter 3 High Frequency Power Amplifier Design 125
3.1 Power Combining Techniques for MMW PAs 125
3.1.1 Introduction 125
3.1.2 Direct Combining 125
3.1.3 Wilkinson Combiner/Splitter 126
3.1.4 Quadrature Combiner/Splitter 128
3.1.5 Transformer 129
3.1.6 Distributed Active-Transformer (DAT) 131
3.2 Design of A 1.2V Broadband D-band Power Amplifier with 13.2-dBm Output Power in Standard RF 65-nm CMOS 135
3.2.1 Introduction 135
3.2.2 Concept of the Proposed Impedance Transformation Network 136
3.2.3 Circuit Design and Simulation Results 139
3.2.4 Measurement Results 153
3.2.5 Discussions 158
3.2.5.1 Interpretation the inconsistencies of the return loss 158
3.2.5.2 Discussion of wedge and ball bonding wire 162
3.3 Summary 163
Chapter 4 Conclusions 165
REFERENCE 167

[1]S. Pinel, S. Sarkar, P. Sen, B. Perumana, D. Yeh, D. Dawn, J. Laskar, “A 90nm CMOS 60GHz radio,” ISSCC Dig. Tech. Papers, pp. 130–131, Feb. 2008.
[2]M. Tanomura, Y. Hamada, S. Kishimoto, M. Ito, N. Orihashi, K. Maruhashi, H. Shimawaki, “TX and RX front-ends for 60 GHz band in 90nm standard bulk CMOS,” ISSCC Dig. Tech. Papers, pp. 558–559, Feb. 2008.
[3]A. Tomkins, R. A. Aroca, T. Yamamoto, S. T. Nicolson, Y. Doi, and S. P. Voinigescu, “A zero-IF 60 GHz 65 nm CMOS transceiver with direct BPSK modulation demonstrating up to 6 Gb/s data rates over a 2 m wireless link,” IEEE J. Solid-State Circuits, vol. 44, no. 8, pp. 2085–2099, Aug. 2009.
[4]C. Marcu, D. Chowdhury, C. Thakkar, L.-K. Kong, M. Tabesh, J.-D. Park, Y. Wang, B. Afshar, A. Gupta, A. Arbabian, S. Gambini, R. Zamani, A. M. Niknejad, E. Alon, “A 90nm CMOS low-power 60 GHz transceiver with integrated baseband circuitry,” ISSCC Dig. Tech. Papers, pp. 314–315, Feb. 2009.
[5]K. Okada, K. Matsushita, K. Bunsen, R. Murakami, A. Musa, T. Sato, H. Asada, N. Takayama, N. Li, S. Ito, W. Chaivipas, R. Minami, A. Matsuzawa, “A 60 GHz 16QAM/8PSK/QPSK/BPSK direct-conversion transceiver for IEEE 802.15.3c,” ISSCC Dig. Tech. Papers, pp. 160–161, Feb. 2011.
[6]A. Siligaris, O. Richard, B. Martineau, C. Mounet, F. Chaix, R. Ferragut, C. Dehos, J. Lanteri, L. Dussopt, S. D. Yamamoto, R. Pilard, P. Busson, A. Cathelin, D. Belot, P. Vincent, “A 65nm CMOS fully integrated transceiver module for 60 GHz wireless HD applications,” ISSCC Dig. Tech. Papers, pp. 162–163, Feb. 2011.
[7]S. Emami, R. F Wiser, E. Ali, M. G Forbes, M. Q Gordon, X. Guan, S. Lo, P. T McElwee, J. Parker, J. R Tani, J. M Gilbert, C. H Doan, “A 60 GHz CMOS phased-array transceiver pair for multi-Gb/s wireless communications,” ISSCC Dig. Tech. Papers, pp. 164–165, Feb. 2011.
[8]V. Vidojkovic, G. Mangraviti, K. Khalaf, V. Szortyka, K. Vaesen, W. V. Thillo, B. Parvais, M. Libois, S. Thijs, J. R. Long, C. Soens, P. Wambacq, “A low-power 57-to-66GHz transceiver in 40nm LP CMOS with -17dB EVM at 7Gb/s,” ISSCC Dig. Tech. Papers, pp. 268–269, Feb. 2012.
[9]WirelessHD Specification Version 1.1 Overview, May, 2010. [Online]. Available: http://www.wirelesshd.org/
[10]WiGig White Paper Version 1.1, July, 2010. [Online]. Available: http://wirelessgigabitalliance.org/specifications/
[11]Standard for Information Technology—Telecommunications and Information Exchange Between Systems—Local and Metropolitan Area Networks—Specific Requirements. Part 15.3: Wireless Medium Access Control (MAC) and Physical Layer (PHY) Specifications for High Rate Wireless Personal Area Networks (WPANs). Amendment 2: Millimeter-Wave-Based Alternative Physical Layer Extension, IEEE Standard 802.15.3c-2009, 2009.
[12]Draft Standard for Information Technology—Telecommunications and Information Exchange Between Systems—Local and Metropolitan Area Networks—Specific Requirements, Part 11: Wireless LAN Medium Access Control 5 (MAC) and Physical Layer (PHY) Specifications. Amendment 6: Enhancements for Very High Throughput in the 60 GHz Band, IEEE Standard P802.11ad™/D0.1, 2010.
[13]J.-H. Tsai, P.-S. Wu, C.-S. Lin, T.-W. Huang, J. G. J. Chern, W.-C. Huang, and H. Wang, “A 25–75-GHz broadband Gilbert-cell mixer using 90 nm CMOS technology,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 4, pp. 247–249, Apr. 2007.
[14]J.-H. Tsai, H.-Y. Yang, Tian-Wei Huang, and Huei Wang, “A 30–100 GHz wideband sub-harmonic active mixer in 90 nm CMOS technology,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 8, pp. 554–556, Aug. 2008.
[15]J.-H. Chen, C.-C. Kuo, Y.-M. Hsin, and H. Wang, “A 15–50 GHz broadband resistive FET ring mixer using 0.18-um CMOS technology,” in IEEE MTT-S Int. Microw. Symp. Dig., 2010, pp. 784–787
[16]J.-H. Tsai, P.-S. Wu, C.-S. Lin, T.-W. Huang, J. G. J. Chern, W.-C. Huang, and H. Wang, “A 25–75-GHz broadband Gilbert-cell mixer using 90 nm CMOS technology,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 4, pp. 247–249, Apr. 2007.
[17]J.-H. Tsai, “Design of 40–108-GHz low-power and high-speed CMOS up-/down-conversion ring mixers for multistandard MMW radio applications,” IEEE Trans. Microw. Theory Tech., vol. 60, no. 3, pp. 670–678, March 2012.
[18]E. Laskin, P. Chevalier, A. Chantre, B. Sautreuil, and S. P. Voinigescu, “165-GHz transceiver in SiGe technology,” IEEE J. Solid-State Circuits, vol. 43, no. 5, pp. 1087–1100, May 2008.
[19]S. P. Voinigescu, E. Laskin, I Sarkas, K.H.K. Yau, S. Shahramian, A. Hart, A. Tomkins, P. Chevalier, J. Hasch, P. Garcia, A. Chantre, B. Sautreuil, “Silicon D-band wireless transceivers and applications,” in Proceedings of Asia-Pacific Microwave Conf. , pp. 1857–1867, Dec. 2010.
[20]Adrian Tang, G. Virbila, D. Murphy, F. Hsiao, Y. H. Wang, Q. J. Gu, Z. Xu, Y. Wu, M. Zhu, M.-C. Frank Chang, “A 144GHz 0.76cm-resolution sub-carrier SAR phase radar for 3D imaging in 65nm CMOS,” ISSCC Dig. Tech. Papers, pp. 264–265, Feb. 2012.
[21]A. Hajimiri, “Next-generation CMOS RF power amplifier,” IEEE Microw. Mag., vol. 12, no. 1, pp. 38–45, Feb. 2011.
[22]H.-Y. Chang, T.-W. Huang, H. Wang, Y.-C. Wang, P.-C. Chao, and C.-H. Chen, “Broad-band HBT BPSK and IQ modulator MMICs and millimeter-wave vector signal characterization,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 3, pp. 908–919, March 2004.
[23]S. J. Mahon, E. Convert, P. T. Beasly, A. Bessemoulin, A. Dadello, A. Costantini, A. Fattorini, M. G. McCulloch, B. G. Lawrence, and J. T. Harvey, “Broadband integrated millimeter-wave up- and down-converter GaAs MMICs,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 5, pp. 2050–2060, May 2006.
[24]Y. Hamada, K. Maruhashi, M. Ito, S. Kishimoto, T. Morimoto, and K. Ohata, “A 60-GHz-band compact IQ modulator MMIC for ultra-high-speed wireless communication,” in IEEE MTT-S Int. Microwave Symp. Dig., June, 2006, pp. 1701–1704.
[25]H.-Y. Chang, “Design of broadband highly linear IQ modulator using a 0.5 um E/D-PHEMT process for millimeter-wave applications,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 7, pp. 491–493, July 2008.
[26]M. Gavell, H. Zirath, M. Ferndahl, S. E. Gunnarsson, “A linear 70-95 GHz differential IQ modulator for E-band wireless communication,” in IEEE MTT-S Int. Microwave Symp. Dig., June, 2010, pp. 788–791.
[27]H.-Y. Chang, P.-S. Wu, T.-W. Huang, H. Wang, C.-L. Chang, John G.J. Chern, “Design and analysis of CMOS broad-band compact high-linearity modulators for gigabit microwave/millimeter-wave applications,” IEEE Trans. Microw. Theory Tech., vol. 54, no.1, pp. 20–30, Jan. 2006.
[28]J.-H. Tsai, T.-W. Huang, “35–65-GHz CMOS broadband modulator and demodulator with sub-harmonic pumping for MMW wireless gigabit applications,” IEEE Trans. Microw. Theory Tech., vol. 55, no.10, pp. 2075–2085, Oct. 2007.
[29]J.-H. Tsai, “Design of 1.2-V broadband high data-rate MMW CMOS I/Q modulator and demodulator using modified Gilbert-cell mixer,” IEEE Trans. Microw. Theory Tech., vol. 59, no.5, pp. 1350–1360, May 2011.
[30]Y.-C. Tsai, J.-L. Kuo, J.-H. Tsai, K.-Y. Lin, and H. Wang, “A 50-70 GHz I/Q modulator with improved sideband suppression using HPF/LPF based quadrature power splitter,” in IEEE MTT-S Int. Microwave Symp. Dig., June, 2011.
[31]V. K. Paidi, Z. Griffith, W. Yun, M. Dahlstrom, M. Urteaga, N. Parthasarathy, S. Munkyo, L. Samoska, A. Fung, and M. J. W. Rod-well, “G-band (140–220 GHz) and W-band (75–110 GHz) InP DHBT medium power amplifiers,” IEEE Trans. Microw. Theory Tech., vol.53, no. 2, pp. 598–605, Feb. 2005.
[32]W. R. Deal, X. B. Mei, V. Radisic, M. D. Lange, W. Yoshida, P.-H. Liu, J. Uyeda, M. E. Barsky, A. Fung, T. Gaier, and R. Lai, “Development of sub-millimeter-wave power amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 55, no.12, pp. 2719–2726, Dec. 2007.
[33]A. Tessmann, I. Kallfass, A. Leuther, H. Massler, M.l Kuri, M. Riessle, M. Zink, R. Sommer, A. Wahlen, H. Essen, V. Hurm, M. Schlechtweg, and O. Ambacher, “Metamorphic HEMT MMICs and modules for use in a high-bandwidth 210 GHz radar,” IEEE J. Solid-State Circuits, vol. 43, no. 10, pp. 2194–2205, Oct. 2008.
[34]V. Radisic, D. Scott, S. Wang, A. Cavus, A. G.-Aitken, and W. R. Deal, “235 GHz amplifier using 150 nm InP HBT high power density transistor,” IEEE Microw. Wireless Compon. Lett., vol. 21, no. 6, pp. 335–337, June 2011.
[35]V. Radisic, K. M. K. H. Leong, X. B. Mei, S. Sarkozy, W. Yoshida, P.-H. Liu, J. Uyeda, R. Lai, and W. R. Deal, “A 50 mW 220 GHz power amplifier module,” in IEEE MTT-S Int. Dig., May 2010, pp. 45–48.
[36]C. Y Law, A.-V. Pham, “A high-gain 60GHz power amplifier with 20dBm output power in 90nm CMOS,” ISSCC Dig. Tech. Papers, pp. 426–427, Feb. 2010.
[37]Y.-S. Jiang, J.-H. Tsai, and H. Wang, “A W-band medium power amplifier in 90 nm CMOS,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 12, pp. 191–193, Dec. 2008.
[38]Z. Xu, Q. J. Gu and M.-C. F. Chang, “A W-band current combined power amplifier with 14.8dBm Psat and 9.4% maximum PAE in 65nm CMOS,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2011.
[39]K.-Y. Wang, T.-Y. Chang, C.-K. Wang, “A 1V 19.3dBm 79GHz power amplifier in 65nm CMOS,” IEEE ISSCC Dig. Tech. Papers, pp. 260–262, Feb. 2012.
[40]Z. Xu, Q. J. Gu, I. Ku, and M.-C. F. Chang, “A compact, fully differential D-band CMOS amplifier in 65nm CMOS,” in Proc. IEEE Asian Solid-State Circuits Conference (ASSCC), Nov. 2010.
[41]M. Seo, B. Jagannathan, C. Carta, J. Pekarik, L. Chen, C. P. Yue, M. Rodwell, “A 1.1V 150GHz amplifier with 8dB gain and +6dBm saturated output power in standard digital 65nm CMOS using dummy-prefilled microstrip lines,” ISSCC Dig. Tech. Papers, pp.484–485, Feb. 2009.
[42]U. R Pfeiffer, E. Ojefors, Y. Zhao, “A SiGe quadrature transmitter and receiver chipset for emerging high-frequency applications at 160GHz,” ISSCC Dig. Tech. Papers, pp.416–417, Feb. 2010.
[43]E. Laskin, K. W. Tang, K. H. K. Yau, P. Chevalier, A. Chantre, B. Sautreuil, S. P. Voinigescu, “170-GHz transceiver with on-chip antennas in SiGe technology,” in IEEE Radio Freq. Integr. Circuits Symp., pp. 637–640, July 2008.
[44]D. Hou, Y.-Z. Xiong, W.-L. Goh, W. Hong, and M. Madihian, “A D-Band cascode amplifier with 24.3 dB gain and 7.7 dBm output power in 0.13 um SiGe BiCMOS technology,” IEEE Microw. Wireless Compon. Lett., vol. 22, no. 4, pp. 191–193, Apr. 2012.
[45]Digital Modulation in Communications Systems — An Introduction, Agilent Application Note 1298.
[46]Behzad Razavi, RF Microelectronics, Second Edition, Prentice-Hall Inc., Upper Saddle River, NJ, 2012.
[47]Rodger E. Zimmer, and William H. Tranter, Principles of Communications, Fifth Edition, John Wiley & Sons, Inc., 111 River Street, Hoboken, NJ, 2002.
[48]L. Litwin, and M. Pugel, “The principles of OFDM,” RF Signal Processing. [Online]. Available: http://www.rfdesign.com, pp. 30–48, Jan. 2001.
[49]S. Forestier, P. Bouysse, R. Quere, A. Mallet, J. Nebus, and L. Lapierre, “Joint optimization of the power-added efficiency and the error-vector measurement of 20-GHz pHEMT amplifier through a new dynamic bias-control method,” IEEE Trans. Microw. Theory Tech., vol. 52, no.4, pp. 1132–1141, April 2004.
[50]M. D. McKinley, K. A. Remley, M. Mylinski, J. S. Kenney, D. Schreurs, B. Nauwelaers, “EVM calculation for broadband modulated signals,” in 64th ARFTG Microwave Measurement Conference, Orlando, FL, Dec. 2004, pp. 45–52.
[51]R. A. Shafik, Md. S. Rahman, AHM R. Islam, “On the extended relationships among EVM, BER and SNR as performance metrics,” IEEE Conf. on Electrical and Computer Engineering (ICECE), pp. 408–411, Dec. 2006.
[52]A. A. Abidi, “Direct-conversion radio transceivers for digital communications,” IEEE J. Solid-State Circuits, vol. 30, no. 12, pp. 1399–1410, Dec. 1995.
[53]B. Razavi, “Design considerations for direct-conversion receivers,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 44, pp. 428–435, June 1996.
[54]A. Brillant and D. Pezo, “Modulation imperfections in IS54 dual mode cellular radio.” In Proceedings of the 27th European Microwave Conference and Exhibition, 1997, pp. 347–353.
[55]K. W. Hamed, A. P. Freundorfer, Y. M. M. Antar, P. Frank, and D. Sawatzky, “A high-bit rate Ka-band direct conversion QPSK demodulator," IEEE Microw. Wireless Compon. Lett., vol. 18, no. 5, pp. 365–367, July, 2008.
[56]H.-Y. Chang, S.-H. Weng, and C.-C. Chiong, “A 30–50 GHz wide modulation bandwidth bidirectional BPSK demodulator/modulator with low LO power,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 5, pp. 332–334, May, 2009.
[57]J. Kim, W. Choi, Y. Park, and Y. Kwon, “60 GHz broadband image rejection receiver using varactor tuning,” in IEEE Radio Freq. Integr. Circuits Symp. Dig., Jun. 2010, pp. 381–384.
[58]A. Georgiadis, “Gain, phase imbalance, and phase noise effects on error vector magnitude,” IEEE Trans. Veh. Technol., vol.53, no.2, pp. 443–449, March 2004.
[59]R. Liu, Y. Li, H. Chen, Z. Wang, “EVM estimation by analyzing transmitter imperfections mathematically and graphically,” Analog Integr. Circuits Signal Process, vol. 48, No. 3, pp. 257–262, 2006.
[60]S. Merchan, A. G. Armada, and J. L. Garcia, “OFDM performance in amplifier nonlinearity,” IEEE Trans. Broadcast., vol. 44, no.1, pp. 106–114, Mar. 1998.
[61]B. Razavi, T. Aytur, C. Lam, F.-R. Yang, R.-H. Yan, H.-C. Kang, C.-C. Hsu, C.-C. Lee, “Multiband UWB transceivers,” in Proc. 2005 IEEE Custom Integrated Circuits Conference (CICC), pp.141–148, Sep. 2005.
[62]A. Musa, R. Murakami, T. Sato, W. Chaivipas, K. Okada, A. Matsuzawa, “A low phase noise quadrature injection locked frequency synthesizer for MM-wave applications,” IEEE J. Solid-State Circuits, vol. 46, no. 11, pp. 2635–2649, Nov. 2011.
[63]J. Jeong, Y. Kwon, “A fully integrated V-band PLL MMIC using 0.15-um GaAs pHEMT technology,” IEEE J. Solid-State Circuits, vol. 41, no. 5, pp. 1042–1050, May 2006.
[64]D. Norgaard, “The phase-shift method of single sideband signal generation,” Proceedings of the IRE, December 1956, pp. 1718–1735.
[65]“TSMC 90nm CMOS Mixed Signal RF Low Power 1P9M Salicide Cu_lowK 1.2&2.5V Spice Model”, ver. 1.2, Taiwan Semiconductor Manufacturing Co., LTD, Hsinchu, Taiwan, R.O.C., Feb. 2009.
[66]N. Marchand, “Transmission-line conversion transformers,” Electronics Letter, vol. 17, no.2, pp. 142–146, Dec. 1994.
[67]S.-F. Chao, J.-J. Kuo, C.-L. Lin, M.-D. Tsai, and H. Wang, “A DC–11.5 GHz low-power, wideband amplifier using splitting-load inductive peaking technique,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 7, pp. 482–484, Jul. 2008.
[68]P. J. Sulivan, B. A. Xavier, and W. H. Ku, “Low voltage performance of a microwave CMOS Gilbert cell mixer,” IEEE J. Solid-State Circuits, vol. 32, no. 7, pp. 1151–1155, July 1997.
[69]L. Han, K. Wu, and X.-P. Chen, “Accurate synthesis of four-line interdigitated coupler,” IEEE Trans. Microw. Theory Tech., vol. 57, no.10, pp. 2444–2455, Oct. 2009.
[70]王士鳴撰，微帶線高指向性耦合結構之研究與其應用，國立交通大學電信工程學系博士論文，2005年9月。
[71]George D. Vendelin, Anthony M. Pavio, Ulrich L. Rohde, Microwave Circuit Design Using Linear and Nonlinear Techniques, 2nd Edition, John Wiley & Sons, Inc., Hoboken, New Jersey, 2005.
[72]M.-F. Lei, P.-S. Wu, T.-W. Huang, and H. Wang, “Design and analysis of a miniature W-band MMIC subharmonically pumped resistive mixer,” in IEEE MTT-S Int. Microwave Symp. Dig., June, 2004, pp. 235–238.
[73]Y.-J. Hwang, C.-H. Lian, H. Wang, M. W. Sinclair, R. G. Gough, H. Kanoniuk, and T.-H. Chu, “A 78-114 GHz monolithic sub-harmonically pumped GaAs-based HEMT diode mixer," IEEE Microw. Wireless Compon. Lett., vol. 12, no. 6, pp. 209–211, June, 2002.
[74]Y.-J. Hwang, H. Wang, and T.-H. Chu, “A W-band subharmonically pumped monolithic GaAs-based HEMT gate mixer," IEEE Microw. Wireless Compon. Lett., vol. 14, no. 7, pp. 313–315, July, 2004.
[75]Guillermo Gonzales, Microwave Transistor Amplifier Analysis and Design, 2nd Edition, Prentice-Hall Inc., Englewood Cliffs, 1997.
[76][Online]. Available: http://www.ti.com/product/opa357, 250MHz, Rail-to-Rail I/O, CMOS Operational Amplifiers w/ Shutdown (Rev. E) Datasheet, Texas Instruments Inc., May 2009.
[77]Adel S. Sedra, Kenneth C. Smith, Microelectronic Circuit, 5th Edition, Oxford University Press, Inc., 2004.
[78]WIN semiconductor GaAs 0.15 μm pHEMT Model Handbook. Taipei, Taiwan, R.O.C.: WIN Semiconduct., 2003.
[79]S. E. Gunnarsson, C. Karnfelt, H. Zirath, R. Kozhuharov, D. Kuylenstierna, A. Alping, and C. Fager, “Highly integrated 60 GHz transmitter and receiver MMICs in a GaAs pHEMT technology,” IEEE J. Solid-State Circuits, vol. 40, no. 11, pp. 2174–2186, Nov. 2005.
[80]H. Wang, J.-H. Tsai, K.-Y. Lin, Z.-M. Tsai, and T.-W. Huang, “CMOS power amplifiers for millimeter-wave applications,” to appear in IEEE Microw. Mag.
[81]S. J. Mahon, A. C. Young, A. P. Fattorini and J. T. Harvey, “6.5 watt, 35 GHz balanced power amplifier MMIC using 6-inch GaAs pHEMT commercial technology,” in IEEE Compound Semiconduct. IC Symp. (CSICS), Oct. 2008.
[82]V. Radisic, K. M.K.H. Leong, S. Sarkozy, X. Mei, W. Yoshida, P.-H. Liu, and R. Lai, “A 75 mW 210 GHz power amplifier module,” in IEEE Compound Semiconduct. IC Symp. (CSICS), Oct. 2011.
[83]A. Komijani, and A. Hajimiri, “A wideband 77-GHz, 17.5-dBm fully integrated power amplifier in silicon,” IEEE J. Solid-State Circuits., vol. 41, no. 8, pp. 1749–1756, Aug. 2006.
[84]T. Suzuki, Y. Kawano, M. Sato, T. Hirose, K. Joshin, “60 and 77 GHz power amplifiers in standard 90nm CMOS,” IEEE ISSCC Dig. Tech. Papers, pp. 562–573, Feb. 2008.
[85]David M. Pozar, Microwave Engineering, 3rd Edition, John Wiley & Sons, Inc., Hoboken, New Jersey, 2005.
[86]P. J. Riemer, J. S. Humble, J. F. Prairie, J. D. Coker, B. A. Randall, B. K. Gilbert, and E. S. Daniel, “Ka-band SiGe HBT power amplifier for single-chip T/R module applications,” in IEEE MTT-S Int. Microwave Symp. Dig., June, 2007, pp. 1071–1074.
[87]Y.-S. Jiang, J.-H. Tsai, and H. Wang, “A W-band medium power amplifier in 90nm CMOS,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 12, pp. 818–820, Dec. 2008.
[88]W. R. Deal, X. B. Mei, V. Radisic, B. Bayuk, A. Fung, W. Yoshida, P. R. Liu, J. Uyeda, L. Samoska, T. Gaier, R. Lai, “A balanced sub-millimeter wave power amplifier,” in IEEE MTT-S Int. Microwave Symp. Dig., June, 2008, pp. 399–402.
[89]J. Lee, C.-C. Chen, J.-H. Tsai, K.-Y. Lin and H. Wang, “A 68-83 GHz power amplifier in 90 nm CMOS,” in IEEE MTT-S Int. Microwave Symp. Dig., June, 2009, pp. 437–440.
[90]A. Dadello, A. Fattorini, S. J. Mahon, A. Bessemoulin, and J. T. Harvey, “44-GHz high power and driver microstrip amplifier MMICs using 6-inch 0.15-um PHEMTs” In Proceedings of the 36th European Microwave Conference and Exhibition, 2006, pp. 1709–1712.
[91]I. Aoki, S. Kee, R. Magoon, R. Aparicio, F. Bohn, J. Zachan, G. Hatcher, D. McClymont, and A. Hajimiri, “A fully-integrated quad-band GSM/GPRS CMOS power amplifier,” IEEE J. Solid-State Circuits, vol. 43, no. 12, pp. 2747–2758, Dec. 2008.
[92]K. H. An, et al, “Power-combining transformer techniques for fully-integrated CMOS power amplifiers,” IEEE J. Solid-State Circuits., vol. 43, no. 5, pp. 1064–1075, May 2008.
[93]W. L. Chan, and J. R. Long, “A 58–65 GHz neutralized CMOS power amplifier with PAE above 10% at 1-V supply,” IEEE J. Solid-State Circuits., vol. 45, no. 3, pp. 554–564, March 2010.
[94]J. Kim, et al, “A linear multi-mode CMOS power amplifier with discrete resizing and concurrent power combining structure,” IEEE J. Solid-State Circuits., vol. 46, no. 5, pp. 1034–1048, May 2011.
[95]J. Kim, et al, “A fully-integrated high-power linear CMOS power amplifier with a parallel-series combining transformer,” IEEE J. Solid-State Circuits., vol. 47, no. 3, pp. 599–614, March 2012.
[96]J.-W. Lai, A. Valdes-Garcia, “A 1V 17.9dBm 60GHz power amplifier in standard 65 nm CMOS,” IEEE ISSCC Dig. Tech. Papers, pp. 424–425, Feb. 2010.
[97]J. Chen, A. M Niknejad, “A compact 1V 18.6dBm 60GHz power amplifier in 65nm CMOS,” IEEE ISSCC Dig. Tech. Papers, pp. 432–433, Feb. 2011.
[98]I. Aoki, S. D. Kee, D. B. Rutledge, and A. Hajimiri, “Fully integrated CMOS power amplifier design using the distributed active-transformer architecture,” IEEE J. Solid-State Circuits., vol. 37, no. 3, pp. 371–383, March 2002.
[99]U. R. Pfeiffer, and D. Goren, “A 23-dBm 60-GHz distributed active transformer in a silicon process technology,” IEEE Trans. Microw. Theory Tech., vol. 55, no.5, pp. 857–865, May 2007.
[100]Y.-N. Jen, J.-H. Tsai, T.-W. Huang, and H. Wang, “Design and analysis of a 55-71-GHz compact and broadband distributed active transformer power amplifier in 90-nm CMOS process,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 7, pp. 1637– 1646, July 2009.
[101]P.-C. Huang, Z.-M. Tsai, K.-Y. Lin, and H. Wang, “A high-efficiency, broadband CMOS power amplifier for cognitive radio applications,” IEEE Trans. Microw. Theory and Tech., vol. 58, no. 12, pp. 3556–3564, Dec. 2010.
[102]H. Wang, and A. Hajimiri, “A CMOS broadband power amplifier with a transformer-based high-order output matching network,” IEEE J. Solid-State Circuits, vol. 45, no. 12, pp. 2709–2722, Dec. 2010.
[103]“TSMC 65nm CMOS Mixed Signal RF 1P9M Salicide Low-K IMD 1P6M-1P9M PDK”, ver. 1.0b, Taiwan Semiconductor Manufacturing Co., LTD, Hsinchu, Taiwan, R.O.C., Sep. 2008.
[104]http://www.tpt-wirebonder.com/en/applications/wedge-wedge/
[105]http://www.tpt-wirebonder.com/en/applications/ball-wedge/
[106]J. Pan, and P. Fraud, “Wire bonding challenges in optoelectronics packaging,” in Proceedings of the 1st SME Annual Manufacturing Technology Summit: Dearborn, MI, August 1, 2004.
[107]D. J. Beck, and A. C. Perez, “Wire bond technology the great debate: ball vs. wedge,” EE Times Education & Training Technical Papers, Sept. 2011.