臺灣博碩士論文加值系統

在目前高頻雷達的應用中，76GHz~81GHz的頻段是歐洲規格的短距離雷達頻率範圍，最普遍的應用就是汽車雷達，日本也將跟進這個趨勢。因此本篇論文首先會討論到的是77GHz短距離雷達目前在世界上的發展趨勢、以及毫米波雷達在應用上的優勢，接著會討論77GHz汽車雷達的系統要求、應用以及規格、演算法等等，做一個詳細的介紹。汽車雷達採用的是調頻連續波應用(FMCW)，關於此應用之原理、公式推導以及每個參數之間的關係，在本篇論文中都將會有仔細的介紹。
而有這樣的理論基礎之後，更重要的是將理論化為實際。關於電路實做的部分，也就是本篇論文下半部將以ΔΣ除小數頻率合成器為例，介紹如何以互補式金氧半導體(CMOS)在台積電先進的65奈米製程之下，實做出77 GHz調頻連續波應用之汽車雷達電路。本篇論文將介紹77 GHzΔΣ除小數頻率合成器，當應用在連續調頻雷達時， 按照系統需求去做適當的電路設計。
77 GHz連續調頻應用之ΔΣ除小數頻率合成器包含石英晶體震盪器、相位頻率比較器、充電磊、迴路濾波器、電壓控制震盪器、注入鎖定除頻器、互補式除頻器、多模除數除頻器，還有ΔΣ除小數數位控制區塊。本篇論文再介紹電路的系統規劃之後，便可決定石英晶體震盪器的選擇、充電磊的電流大小、迴路濾波器每一個電阻與電容大小的選取、電壓控制震盪器的設計規格與要求、注入鎖定除頻器的頻率範圍、互補式除頻器的操作曲線、多模除數除頻器的除數範圍，以及ΔΣ除小數數位控制區塊的解析度規格等等。由巨觀的系統規劃到細部的電路設計考量，本篇論文都會鉅細靡遺的做詳細的闡述。
而在頻率合成器中同時包含了射頻電路與數位電路的部分，這兩個部分互有所專、各司其職，由於數位電路的部分會影響到射頻電路的表現。關於這樣的問題，本篇論文也將討論其因應之道。

Between radio frequency radar applications, 76GHz~81GHz band has been dedicated to short range radar in Europe. Japan is also looking forward to this as well. Therefore, first of all 77GHz short range radar’s development, background and motivation will be discussed. After that, the following is specification, application, and system requirement of 77GHz car radar introduction. This kind of car radar mainly applies FMCW radar system. About FMCW radar system, there will also be a careful explanation.
Besides, what the more important is how to put the theory into practical. To achieve this acquirement, the following half part of thesis will take 77GHz CMOS ΔΣ Fractional-N Frequency Synthesizer for example, showing how to implement this integrated circuit design in TSMC 65nm CMOS process.
The proposed 77GHz CMOS ΔΣ Fractional-N Frequency Synthesizer includes crystal oscillator, phase frequency detector (PFD), charge pump (CP), loop filter (LF), voltage controlled oscillator (VCO), injection-locked frequency divider (ILFD), current-mode logic (CML), multi-modulus divider (MMD), and ΔΣ modulator. Furthermore, important parameters for circuits above will also be discussed.
This frequency synthesizer contains RF part and digital part. Both parts take their own rules, but the interference will also exist. How to prevent such problem will be included.

口試委員會審定書 #
誌謝 ……………………………………………………………………………i
中文摘要 ……………………………………………………………………………iii
ABSTRACT iv
CONTENTS v
LIST OF FIGURES vii
LIST OF TABLES x
Chapter 1 Introduction 1
1.1 Background and Motivation 1
1.2 Radar Principles 5
1.3 Thesis Organization 6
Chapter 2 77 GHz FMCW Car Radar Transmitter 7
2.1 CW radar 8
2.2 FMCW radar features 10
2.3 FMCW radar formulas 11
Chapter 3 A miniaturized V-band PLL using differential control technique 16
3.1 Circuit Architecture 17
3.1.1 Capacitor Reduction Technique 17
3.1.2 VCO and PFD, Digital Frequency Divider 19
3.2 Circuit Simulation 21
3.3 Chip Layout & Measurement 25
3.4 Summary 34
Chapter 4 77 GHz ΔΣ Fractional-N Frequency Synthesizer in 65nm CMOS 35
4.1 Digital ΔΣ Modulator 37
4.1.1 Digital Phase Accumulator (DPA) 37
4.1.2 First-Order ΔΣ Modulator 38
4.1.3 Multi-Stage-Noise-Shaping (MASH) ΔΣ Modulators 39
4.1.4 Quantization Noise 40
4.2 The Implementation and Simulation of ΔΣ Modulator 42
4.3 Proposed Architecture 48
4.3.1 Phase Frequency Detector (PFD) 48
4.3.2 Charge Pump (CP) 49
4.3.3 Loop Filter (LF) 49
4.3.4 Voltage Controlled Oscillator (VCO) 50
4.3.5 Injection-Locked frequency divider (ILFD) 52
4.3.6 Current-Mode Logic (CML) 53
4.3.7 Multi-Modulus Divider (MMD) 54
4.3.8 Crystal Selection 55
4.3.9 Layout Consideration 56
4.3.10 Transistor-Level Simulation 57
4.4 Experimental Results 60
4.5 Summary 65
Chapter 5 Conclusions 66
REFERENCE 67

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