臺灣博碩士論文加值系統

為了提升提高III-V族金氧半電晶體的元件表現，並有效解決元件間漏電的現象。我們提出了利用砷化銦鋁(InAlAs)作為背阻障層(Back Barrier)，並結合Mesa結構使元件之間的絕緣性更加提升，經由結構測試導通區域與絕緣區域之電流比約為3個order，證實此元件設計確實是可以有效提升整體絕緣性的。
而在元件開發初期，我們首先透過各製程模組的驗證，以確認各模組之架構是能夠應用於元件製程開發中。在閘極結構上，我們結合非等向性與側向性蝕刻，並利用TaN與TiN對此蝕刻條件的蝕刻率差異，做出單純利用乾式蝕刻方式即可達成的T型閘極結構。而在金氧半電容結構中，我們在沉積氧化物前利用HCl溶液對晶圓表面清洗，希望能有效改善Al2O3與InGaAs之介面品質。電容特性方面，最大電容值約為1.02uF/cm2、Dit也降低至3E12 cm-2eV-1，電容之dispersion~ 3%/decade，CET =3.26nm的表現。最後源/汲極接觸金屬的結構則是使用氮化鈦/鈦或鋁/氮化鈦/鈦多層結構做為與n型InGaAs做歐姆接觸之金屬，而所得最佳特徵電阻值也有1.39E-7Ωcm2的表現。 而所製作之金氧半場效電晶體元件特性方面，元件之導通電流約有Ion=250 uA/um的表現，但元件整體之電流開關特性與較大漏電流的成因機制，需再進一步的研究分析與改善。

In order to improve the performance of III-V MOSFETs and suppress the leakage current, we have adopted a layer of Indium aluminum arsenide (InAlAs) as a back barrier layer in the device structure. A mesa structure is also applied to improve the isolation between devices. Various process modules were developed and verified for InGaAs MOSFET integration. Besides, a novel T-gate formation method combing both anisotropic and lateral etching processes and a bilayer metal stack is proposed. For the MOS structure, HCl-based solution was used for surface clean before oxide deposition in order to improve the interface quality between Al2O3 and InGaAs. In terms of MOS characteristics, the measured maximum capacitance is 1.02 uF/cm2 (CET = 3.26 nm) with frequency dispersion of 3 %/decade and the extracted Dit is about 3E12 cm-2eV-1. TiN/Ti or Al/TiN/Ti-based metal contact structures were fabricated for InGaAs source/drain ohmic contacts, and the lowest contact resistance value of 1.39E-7 Ω•cm2 is achieved. Finally, the fabricated InGaAs MOSFET shows on-current Ion of 250 uA/um. However, the performance of devices in terms of on/off ratio and leakage level requires further improvement by material refinement as well as process optimization.

中文摘要 I
Abstract II
致謝 III
目錄 IV
圖目錄 VII
表目錄 X
第一章 緒論 1
1.1 研究背景 1
1.2 III-V CMOS技術所面對的挑戰 2
1.3 MOS電容之high-k材料 2
1.4 源/汲極接觸電阻 3
1.5 論文架構 4
第二章 製程設備介紹 5
2.1 前言 5
2.1.1 半導體元件製程及四大模組 5
2.2 薄膜設備 5
2.2.1 電漿輔助化學氣相沉積系統PECVD 5
2.2.2 濺鍍機Sputter 6
2.3 黃光設備 7
2.3.1 I-line光學曝光步進機 7
2.3.2 電子束曝光機E-Beam lithography 8
2.4 蝕刻設備 10
2.4.1 反應性離子蝕刻RIE 10
2.4.2 濕式工作台Wet Bench 12
2.5 擴散設備 13
2.5.1 離子佈植Ion Implantation 13
2.5.2 快速熱退火RTA 14
第三章 元件各大模組驗證 15
3.1 金屬蝕刻測試與T-型閘極製作 15
3.1.1 ICP-RIE蝕刻率與profile條件測試 15
3.1.2 利用乾式蝕刻法製作T型閘極 17
3.2 金氧半電容 19
3.2.1 理想金氧半電容模型、能帶分佈及操作原理 19
3.2.2 非理想金氧半電容 22
3.2.2.1 功函數差異及平帶電壓 22
3.2.2.2 氧化層缺陷 23
3.2.2.3 利用電導法估算介面缺陷密度Dit 26
3.2.3 實驗方法及結果討論 27
3.2.3.1 砷化銦鎵金氧半電容製作 27
3.2.3.2 電容特性分析 28
3.3 源/汲極之歐姆接觸結構 36
3.3.1 歐姆接觸原理及能帶結構介紹 36
3.3.1.1 金屬與半導體之接面 36
3.3.1.2 能帶結構定性特徵 36
3.3.1.3 蕭特基接觸及能障 37
3.3.1.4 歐姆接觸 39
3.3.2 傳輸線模型理論及特徵電阻量測 41
3.3.2.1 傳輸線模型及特徵電阻 41
3.3.2.2 特徵電阻量測方法 42
3.3.3 實驗方法及結果討論 45
3.3.3.1 圓形傳輸線模型(CTLM)量測樣品製作 45
3.3.3.2 結果與討論 46
第四章 InGaAs MOSFETs元件整合及特性 49
4.1 In-situ MOSFET之結構與元件設計 49
4.2 元件製作流程 50
4.3 元件特性與結果 53
第五章 結論 58
參考文獻 59

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