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研究生:陳彥儒
研究生(外文):Chen, Yan-Ru
論文名稱:具相位遮蔽電壓模式PWM雙相位直流升壓轉換器
論文名稱(外文):A Voltage-mode PWM Dual-phase DC-DC Boost Converter with Phase Shedding
指導教授:葉美玲葉美玲引用關係
指導教授(外文):Yeh, Mei-Ling
口試委員:林嘉洤黃淑絹葉美玲
口試委員(外文):Lin, Jia-ChuanHuang, Shu-ChuanYeh, Mei-Ling
口試日期:2019-05-01
學位類別:碩士
校院名稱:國立臺灣海洋大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2019
畢業學年度:107
語文別:中文
論文頁數:62
中文關鍵詞:多相位相位遮蔽升壓轉換器
外文關鍵詞:multi-phasephase sheddingboost converter
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近年來,在電源管理系統上的直流轉換器輸出電流需求越來越大。傳統的直流轉換器都是使用單一的功率端(Power Stage),然而,在輸出電流較大的情況下,使用單一功率端會導致電感因承受大量電流使得輸入電容電流漣波和電感體積較大。為了解決此問題,我們將功率端並聯使用,將輸入電流平均分散給每個功率端,降低單一電感上的電流,進而降低電感體積、輸入電容電流漣波抵銷和提升系統轉換效率。這種直流轉換器稱為多相位直流轉換器。雖然使用多相位直流轉換器能提升重載時的系統轉換效率,但在輕載時會因多組的功率電晶體(Power MOS)的切換損失和電路功率損耗導致效率不佳。因此,通常多相位直流轉換器會依據輸出電流操控相位數目進行切換以此得到最佳效率,而此技術稱為相位遮蔽(Phase Shedding),並且隨著相位數目變少,在輕載時系統效率得以改善。
本論文為具相位遮蔽雙相位PWM直流升壓轉換器。因傳統的多相位轉換器都是使用外部訊號去操控相位組數,所以本論文提出一個新型相位遮蔽偵測電路,利用感測電感電流來判斷負載電流大小得到切換相位的訊號,進而切換相位數目。本論文使用TSMC 0.35μm Mixed-Signal 2P4M Polycide 5V製程實現,輸入電壓範圍3.6V到4.2V,輸出電壓為5V,負載電流範圍為10mA到1500mA,各相位切換頻率為1MHz,峰值效率為95.7%,最大輸出電壓漣波為0.6%,晶片面積為2.031×1.745mm2。
In recent years, the dc-dc converter output current needs to be higher in the power management systems. The traditional dc-dc converters uses a single power stage. However, if a single power stage is used to output a higher output current may cause the inductor to withstand a lager current that makes input capacitor current ripple and inductor volume larger. In order to solve this problem, the power stages in parallel are adopted instead that spreads the input current evenly to each of power stage to reduce current on the inductor thereby reducing the inductor volume, input capacitor current ripple cancellation, and improving system conversion efficiency. The type of dc-dc converter is known as multi-phase dc-dc converter. Although the use of multi-phase dc-dc converters can improve system conversion efficiency at heavy loads, it can be inefficient at light loads due to switching losses of multiple sets of power transistors (Power MOS) and circuit power consumption. Therefore, usually the multi-phase dc-dc converter switches the number of phase according to the output current to achieve the best efficiency. This technique is called phase shedding, and as the number of phase becomes smaller, the efficiency is improved at light load.
In this thesis, we achieve a voltage-mode duel-phase PWM boost dc-dc converter with phase shedding. Because the traditional multi-phase converters use external signals to control the number of phase, this thesis proposes a novel phase shedding detection circuit that senses inductor current to determine the load current and obtains the phase switching signal to switch the number of phase. This chip has been implemented using TSMC 0.35um Mixed-Signal 2P4M Polycide 5V process. The input voltage ranges from 3.6 V to 4.2V, output voltage is 5V, load current ranges from 10mA to 1500mA, switching frequency is 1MHz for each of phase, peak efficiency is 95.7%, maximum output ripple voltage is 0.6%, and chip area is 2.031×1.745mm2.
摘要 I
Abstract II
目錄 III
圖目錄 V
表目錄 VII
第一章 緒論 1
1.1研究背景 1
1.2研究動機 2
1.3論文架構 3
第二章 多相位直流升壓轉換器 4
2.1切換式直流升壓轉換器 4
2.1.1工作原理 4
2.1.2連續導通模式 6
2.1.3非連續導通模式 9
2.1.4輸入電流與輸出電容電流分析 11
2.2多相位直流升壓轉換器 13
2.2.1基本介紹 14
2.2.2輸入電感與輸出電容分析 15
2.2.3輸入電流與輸出電容電流分析 17
2.3脈衝寬度調變模式 20
2.3.1電壓模式 21
2.3.2電流模式 22
第三章 電路設計與模擬 23
3.1整體電路介紹 23
3.2子電路介紹 24
3.2.1偏壓電路 24
3.2.2誤差放大器 25
3.2.3能隙參考電壓電路 26
3.2.4遲滯比較器 28
3.2.5雙相位時脈產生器 30
3.2.6斜波產生器 32
3.2.7死區控制電路 33
3.2.8準位調整電路 35
3.2.9最高電位選擇電路 36
3.2.10電流感測電路 36
3.2.11緩啟動電路 38
3.2.12相位遮蔽控制電路 39
第四章 整體模擬與晶片佈局 41
4.1設計流程 41
4.2晶片佈局圖與佈局考量 42
4.3整體系統模擬 44
4.3.1輸出電壓連波 45
4.3.2負載穩壓調節率 49
4.3.3線性穩壓調節率 51
4.3.4暫態響應 52
4.4效能總結 53
4.5預計規格表 56
4.6文獻比較表 57
第五章 結論 58
5.1結論 58
5.2未來展望 58
參考文獻 60
[1] X. Zhou, P. L. Wong, P. Xu, F. C. Lee, and A. Q. Huang, “Investigation of Candidate VRM Topologies for Future Microprocessors,” IEEE Trans. Power Electron, vol. 15, no. 6, pp. 1172–1182, Nov. 2000.
[2] C. Parisi, “Multiphase Buck Design From Start to Finish (Part1),” Texas Instruments Application Report No. SLVA882, Apr. 2017 Available: http://www.ti.com/lit/an/slva882/slva882.pdf
[3] R. W. Erickson and D. Maksimovic, Fundamentals of Power Electronics, 2nd ed., Kluwer Academic Publishers: 2001.
[4] 梁適安, 交換式電源供應器之理論與實務設計. 全華圖書股份有限公司, 2008.
[5] E. Roger, “Understanding Boost Power Stages in Switch-Mode Power Supplies,” Texas Instruments Application Report No. SLVA061, Mar. 1999 Available: http://www.ti.com/lit/an/slva061/slva061.pdf
[6] M. Lazic, M. Zivanov, and B. Sasic, “Designing of Multiphase Boost Converter for Hybrid Fuel Cell/Battery Power Sources,” in Paths to Sustainable Energy, InTech, 2010.
[7] M. O’Loughlin, “350-W, Two-Phase Interleaved PFC Pre-Regulator Design Review,” Texas Instruments Application Report No. SLUA369C, Sep. 2013 Available: http://www.ti.com/lit/an/slua369c/slua369c.pdf
[8] R. Crews, “AN-1820 LM5032 Interleaved Boost Converter,” Texas Instruments Application Report No. SNVA335A, May. 2013 Available: http://www.ti.com/lit/an/snva335a/snva335a.pdf
[9] D. Baba, “Under the Hood of a Multiphase Synchronous Rectified Boost Converter,” Texas Instruments Power Supply Design Seminar SEM2100 Topic4 Literature Number No. SLUP323, 2014 Available: https://www.ti.com/seclit/wp/slup323/slup323.pdf
[10] R. Mammano, “Switching Power Supply Topology Voltage Mode vs. Current Mode,” Texas Instruments Unitrode Design Note No. DN-62, 1999 Available: http://www.ti.com/lit/an/slua119/slua119.pdf
[11] R. J. Baker, H. W. Li, and D. E. Boyce, CMOS Circuit Design, Layout and Simulation. 3rd ed., Piscataway, NJ: IEEE Press, 2010.
[12] K. N. Leung, P. K. T. Mok, and C. Y. Leung, “A 2V 23uA 5.3ppm/C Curvature-compensated CMOS Bandgap Reference,” IEEE J. Solid-State Circuits, vol. 38, pp. 561–564, Mar. 2003.
[13] C. Yoo, “A CMOS Buffer without Short-circuit Power Consumption,” IEEE Trans. Circuits Syst. II, vol. 47, pp. 935–937, Sept. 2000.
[14] C. Y. Leung, P. K. T. Mok, and K. N. Leung, "A 1V Integrated Current-mode Boost Converter in Standard 3.3/5-V CMOS Technologies," IEEE J. Solid-State Circuits, vol. 40, no. 11, pp. 2265-2274, Nov. 2005.
[15] T. H. Li, “Automatic Substrate Switching Circuit for Single-Inductor Dual-Output Switching Converter,” Dissertation of the Degree of Master, National Chiao Tung University, 2009.
[16] Y. P. Su, Y. K. Luo, Y. C. Chen, and K. H. Chen, “Current-mode Synthetic Control Technique for High-efficiency DC-DC Boost Converters Over a Wide Load Range,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 22, no. 8, pp. 1666–1678, Aug. 2014.
[17] S. Zhang, M. Zhao, X. Bai, Y. Yao and X. Wu “A 6A, 2.5MHz Integrated Dual-phase DC-DC Buck Converter with Low Quiescent Consumption for Mobile Devices,” IEEE IECON 2017, pp. 497-502, Oct. 2017.
[18] A. Yoo, “Design Implementation, Modeling and Optimization of Next Generation Low-Voltage Power MOSFETs,” Dissertation of the Degree of Doctor, Toronto University, 2010.
[19] A. Hastings, The Art of Analog Layout, 2nd ed., Upper Saddle River, NJ: Pearson/Prentice Hall, 2006.
[20] S. Y. Zhang, M. L. Zhao, X. B. Wu, H. Z. Zhang “Dual-phase DC–DC Buck Converter with Light-load Performance Enhancement for Portable Applications,” IET Power Electronics, vol. 11, no. 4, pp. 719-726, Jan. 2018.
[21] Y. P. Su, W.C. Chen, Y. P. Huang, Y. H. Lee, K. H. Chen, and H.-Y. Luo, “Pseudo-ramp Current Balance (PRCB) Technique with Offset Cancellation Control (OCC) in Dual-phase DC-DC Buck Converter,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst. vol. 22, no. 10, pp. 2192–2205, Oct. 2014.
[22] Y. Ahn, I. Jeon, and J. Roh, “A Multiphase Buck Converter with a Rotating Phase-shedding Scheme for Efficient Light-load Control,” IEEE J. Solid-State Circuits, vol. 49, no. 2, pp. 2673-2683, Oct. 2014.
[23] K. T. Wang “Design of a High Efficiency Dual-Mode DC-DC Boost Converter with Smart Switch Control Dissertation of the Degree of Master,” National Taiwan Ocean University, 2016.
[24] C. Huang and P. K. T. Mok, “An 84.7% Efficiency 100MHz Package Bondwire-based Fully Integrated Buck Converter with Precise DCM Operation and Enhanced Light-load Efficiency,” IEEE J. Solid-State Circuits. vol. 48, no. 11, pp. 2595-2607, Nov. 2013.
[25] J. Abu-Qahouq, H. Mao, and I. Batarseh, “Multiphase Voltage-mode Hysteretic Controlled DC–DC Converter with Novel Current Sharing,” IEEE Trans. Power Electron, vol. 19, no. 6, pp. 1397-1407, Nov. 2004.
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