臺灣博碩士論文加值系統

本碩士論文包含可變頻率震盪器和可變增益放大器的實現和設計。在可變頻率震盪器設計中，設計出一個可以取代MOS可變電容的電路且全由NPN的BJT所組成。在磷化銦鎵/砷化鎵(GaInP/GaAs)製程中，只有NPN的BJT可以使用，所以這電路解決在磷化銦鎵/砷化鎵(GaInP / GaAs)製程中沒有可變電容的窘境。
在可變增益放大器設計中，利用兩級的電流鏡做為放大器，使用AC coupling 的方式把信號couple進來且把信號放大，中間級使用電流的方式把信號衰減，達到wide dynamic range的目的。

Fabricated through a GaInP/GaAs HBT technology, a monolithic variable frequency oscillator (VFO) and a monolithic variable gain amplifier (VGA) were measured and reported in this thesis. A number of issues on the VFO and VGA were detailed as well.
A new circuitry, called a Variable Impedance Converter (VIC), was adopted to mimic a variable capacitor, which was essentially an important element for frequency tuning in a LC-based oscillator design.A negative-impedance converter not only provides the necessary negative resistance for oscillation, but also functions as the voltage level shifters for the VIC. A classic circuit, called a translinear circuit, makes full advantage of the exponential I-V characteristic to linearize the tuning curve of the VFO. No external but two on-chip inductors were used in the VFO.
Several operating principles for a VGA were explored in the VGA chapter. Based these principles we discussed, a wide gain control range VGA was achievable. The designed VGA consisted of a fixed gain preamplifier, a variable attenuator, and a tunable transconductance common-emitter (CE) amplifier, in which the input impedance is also controllable by a voltage controlled resistor. Therefore, by cleverly composing these functions of the controllable components, a low noise VGA with 50dB gain control range result.

中文摘要 i
Abstract ii
誌謝 iii
List Of Figures vi
1 Introduction 1
1.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.2 Thesis Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Receiver Architectures 6
2.1 Super-heterodyne Architecture . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Homodyne Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3 Image-Reject Receivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.3.1 Hartley Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.3.2 Weaver Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.4 Low-IF Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.5 Wide-Band IF Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.6 Digital IF Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.7 Sub-sampling Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.8 Receiver Performance Characterization . . . . . . . . . . . . . . . . . 20
3 Variable Frequency Oscillator 24
3.1 VFO Architecture Introduction . . . . . . . . . . . . . . . . . . . . . . 25
3.2 Variable Impedance Converter . . . . . . . . . . . . . . . . . . . . . 27
3.3 Negative Impedance Converter. . . . . . . . . . . . . . . . . . . . . 35
3.4 Variable Frequency Oscillator . . . . . . . . . . . . . . . . . . . . . . . 39
3.5 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
3.6 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
3.7 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
4 Variable Gain Amplifier 57
4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
4.2 Choice of Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
4.3 Circuit Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
4.4 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
4.5 Measurement Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
4.6 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
5 Conclusions 78
Bibliography . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

[01] Nguyen, N.M.; Meyer, R.G “Start-up and frequency stability in high-frequency oscillators.
[02] M. Soyuer and R. Meyer, “High-frequency phase-locked loops in monolithic bipolar technology,” IEEE J. Solid-State Circuits, vol. 24, pp. 787—795, June 1989.
[03] Qiuting Huang, “Phase noise to carrier ratio in LC oscillators.”
[04] L. Dauphinee, M. Copeland, and P. Schvan, “A balanced 1.5 GHz voltage controlled oscillator with an integrated LC resonator,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 1997, pp. 390—391
[05] Ali Hajimiri & Thomas Lee, The Design of Low Noise Oscillators 1999.
[06] J. Craninckx and M. Steyaert, “A 1.8-GHz CMOS low-phase-noise voltage-controlled oscillator with prescaler,” IEEE J. Solid-State Circuits, vol. 30, pp. 1474—1482, Dec. 1995
[07] D. Ham and A. Hajimiri, "Concepts and Methods in Optimization of Integrated LC VCOs.”
[08] M. Soyuer, K. Jenkins, J. Burghartz, and M. Hulvey, “A 3 V 4 GHz nMOS voltage-controlled oscillator with integrated resonator,” IEEE J. Solid-State Circuits, vol. 31, pp. 2042—2044, Dec. 1996.
[09] Thomas Lee, The Design of CMOS Radio-Frequency Integrated Circuits 1998.
[10] A. Rofougaran, J. Rael, M. Rofougaran, and A. Abidi, “A 900 MHz CMOS LC-oscillator with quadrature outputs,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 1996, pp. 392—393.
[11] Behzad Razavi, RF Microelectronics 1998.
[12] B. Razavi, “A 1.8 GHz CMOS voltage-controlled oscillator,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 1997, pp. 388—389.
[13] J. Zhou & David Allstot, “Monolithic transformers and their application in a differential CMOS RF low-noise amplifier.”
[14] J.J. Rael & A. A. Abidi, “Physical Processes of phase noise in differential LC oscillators.” CICC, 2000.
[15] J.J. Rael & A. A. Abidi, “How to design an IC oscillator first time right.” ISSCC short course, 2001.
[16] J. Craninckx and M. Steyaert “Low-noise voltage-controlled oscillators using enhanced LC-tanks,” IEEE Trans. Circuits Syst., vol. 42, pp. 794—804, Dec. 1995.
[17] Mark Tiebout, “Low-power low-phase-noise differentially tuned quadrature VCO design in standard CMOS.” JSSC July, 2001
[18] N. Nguyen and R. Meyer, “A 1.8-GHz monolithic LC voltage-controlled oscillator,” IEEE J. Solid-State Circuits, vol. 27, pp. 444—450, Mar. 1992.+
[19] Ali Hajimiri, “Concurrent CMOS LNAs and receiver architecture.” Presentation at Intel July 2001.
[20] W.-Z. Chen and J.-T. Wu, “A 2 V 2 GHz BJT variable-frequency oscillator,” in Proc. Bipolar/BiCMOS Circuits and Technology Meet., Sept. 1997, pp. 61—63.
[21] A. Leon-Garcia, “Probability & Random Processes for electrical engineering.”
[22] Applications”, IEEE J. Solid-State Circuits, pp. 2071-2088, Dec. 1997.
[23] P. Orsatti, F. Piazza, Q. Huang, “A 20-mA-Receive, 55-mA-Transmit, Single-Chip GSM Transceiver in 0.25-mm CMOS”, IEEE J. Solid-State Circuits, pp. 1869-1880, Dec. 1999.
[24] M.S.J. Steyaert, J. Janssens, B. Muer de, M. Borremans, N. Itoh, “A 2-V CMOS cellular transceiver front-end”, IEEE J. Solid-stge Circuits, Pages: 1895 - 1907, Dec. 2000
[25] Zoran Zvonar and Rupert Baines, Integrated Solutions for GSM terminals, International Journal of Wireless Information Networks, Vol. 3, No3,1996,pp147~160
[26] Richard C. Sagers, Intercept point and undesired responses, IEEE Trans. on Vehicular Technology, Vol.VT-32, No.1, 1983, pp.121~ 133
[27] John R. Long, Miles A. Copeland, “The Modeling characterization, and Design of Monolithic Inductors for Silicon RF ICs”, IEEE Journal of Solid-State Circuits, pp. 357- 369, Mar 1997.
[28] P. Yue, et al., “A Physical Model for Planar Spiral Inductors on Silicon”, IEDM Proceedings, December 1996.
[29] J. Min, A. Rofougaran, H. Samueli, and A. A. Abidi, “An All-CMOS Architecture for a Low-Power Frequency-Hopped 900 MHz Spread-Spectrum Transceiver,” presented at Customm Integrated Circuits Conference, San Diego, CA, pp. 379-382, 1994.
[30] A. Rofougaran, G. Chang, J. J. Rael, J. Y-C. Chang, M. Rofougaran, P. J.
[31] Chang, M. Djafari, J. Min, E. Roth, A. A. Abidi, and H. Samueli, “A Single-Chip 900 MHz Spread-Spectrum Wireless Transceiver in 1-mm CMOS,” to be published in IEEE Journal of Solid-State Circuits, April 1998.
[32] A. A. Abidi, “Direct-Conversion Radio Transceivers for Digital Communications,” IEEE Journal of Solid-State Circuits, Vol. 30, No. 12,
[33] D. K. Weaver, “A Third Method of Generation and Detection of Single-Sideband Signals,” Proc. IRE, Vol. 44, No. 12, pp. 1703-1705, 1956.
[34] G. Cooper and C. McGillem, Modern Communications and Spread Spectrum. New York: McGraw-Hill, Inc., 1986.
[35] A. Rofougaran, G. Chang, J. J. Rael, M. Rofougaran, S. Khorram, M-K., Ku, E. Roth, A. A. Abidi, and H. Samueli, “A 900 MHz CMOS Frequency-Hopped Spread-Spectrum RF Transmitter IC,” presented at Custom Integrated Circuits Conference, San Diego, CA, pp. 209-212, 1996.
[36] A. Yamagishi, M. Ishikawa, T. Tsukahara, S. Date, “A 2-V, 2-GHz Low-Power Direct Digital Frequency Synthesizer Chip Set for WirelessCommunication,” presented at Custom Integrated Circuits Conference, Santa Clara, CA, pp. 319-322, 1995.
[37] Preliminary Data Sheet of AD9850, Analog Devices, March 26, 1996.
[38] R. Gregorian and G. C. Temes, Analog MOS Integrated Circuits for Signal Processing. New York: John Wiley & Sons, 1986
[39] K. Makie-Fukuda, T. Kikuchi, T. Matsuura, M. Hotta, “Measurement of Digital Mixer-Signal Integrated Circuits,” IEEE Journal of Solid-State Circuits, Vol. 30, No. 2, pp. 87-92, February 1995.