臺灣博碩士論文加值系統

雙向穿隧快閃記憶體( Bi-directional Tunneling Program/Erase 3-D NOR Type Flash Memory，簡稱BiNOR Flash Memory )為近代所開發的快閃記憶體元件中結構較為特殊並且具有極佳的發展性，其中讀取特性更是與傳統的快閃記憶體差別頗大，值得做進一步深入的探討。本論文透過分析其結構上與讀取特性相關的特點，分別討論反向讀取操作、N型場氧化隔絕及淡摻雜源極線對讀取電流大小的影響，並引進電流擁擠效應的概念來分析其最差狀況下之讀取電流大小，結果驗證了反向讀取操作電流較正向讀取操作電流大的優點與事實，其在電流補償效果上也有極佳的效果，N型場氧化隔絕對於串聯阻值的降低有很大的效果，並且主要地舒緩了電流擁擠效應的效果，而淡摻雜源極線使得雙向穿隧快閃記憶體陣列的讀取電流較傳統NOR組態快閃記憶體讀取電流小，需要進一步增進其讀取電流的大小。而藉由上述的討論結果發現其結構上特有的N型場氧化隔絕( N Field Oxide Isolation )對於其讀取電流貢獻極大，因此提出一新型漕溝源極線做法利用此項優點，進一步增進其讀取電流。此種做法不但在製程的可行性及簡易度上面有很大的優點，模擬的結果亦顯示相較於原有的結構，新的做法大幅增進其讀取電流。因此漕溝源極線確為未來在雙向穿隧快閃記憶體上實現快速隨機讀取的操作提供了極為可行的方法。

Among the flash memories developed recently, BiNOR flash memory enlists several unique and promising features. In particular, its read current exhibit fairly different characteristics from that of the conventional flash memories. In this dissertation, the impact of the N field oxide isolation inherent to its structure to the read characteristics is analyzed and discussed. A novel trench source line method is proposed to further increase its read current. This method not only has many advantages of process flexibility and simplicity, but also provides enhance read current compared with the original structure. Consequently, the trench source line is demonstrated as a feasible method for BiNOR to implement fast random access operation in the future.

第一章 緒論………………………………………………………………1
第二章 快閃記憶體陣列與雙向穿隧快閃記憶體之回顧………………3
2.1 各種快閃記憶體陣列………………………………………………3
2.1.1 NOR組態的快閃記憶體陣列……………………………………3
2.1.2 AND組態的快閃記憶體陣列……………………………………4
2.1.3 NAND 組態的快閃記憶體陣列…………………………………5
2.2 雙向穿隧快閃記憶體元件…………………………………………6
第三章 模擬工具與劃……………………………………………………18
3.1 模擬快閃記憶體讀取之模型………………………………………18
3.2 記憶體陣列結構之模擬方法………………………………………19
第四章 模擬分析與結果討論……………………………………………22
4.1 NOR 組態快閃記憶體陣列正向讀取與反向讀取操作之研究……22
4.1.1 NOR組態正向讀取與反向讀取之電流─電壓特性……………23
4.1.2 讀取電流的理論驗證 …………………………………………24
4.1.3 最差狀況下讀取電流 …………………………………………26
4.2 雙向穿隧快閃記憶體與各種陣列的讀取電流之比較……………27
4.2.1 BiNOR快閃記憶體的讀取電流分析……………………………27
4.2.2 AND組態快閃記憶體的讀取電流分析…………………………28
4.2.3 NAND 組態快閃記憶體的讀取電流分析………………………29
4.2.4 各種快閃記憶體的讀取電流之比較 …………………………29
4.3 增進雙向穿隧快閃記憶體的讀取電流之研究……………………30
4.3.1 傳統應用於其他記憶體陣列結構的源極線做法 ……………30
4.3.2 可應用於雙向穿隧快閃記憶體的源極線做法 ………………33
4.3.3 溝槽源極線做法之分析 ………………………………………34
4.3.3.1 溝槽源極線對元件特性之影響……………………………34
4.3.3.2 溝槽源極線對元件讀取電流大小之增進效果……………35
第五章 結論………………………………………………………………64
參考文獻……………………………………………………………………65

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