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研究生:柯清邁
研究生(外文):Chen-Maih Ke
論文名稱:離散餘弦轉換之特殊應用積體電路實作
論文名稱(外文):ASIC implementationof DCT
指導教授:黃有榕
指導教授(外文):Yu-Jung Huang
學位類別:碩士
校院名稱:義守大學
系所名稱:電子工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2000
畢業學年度:88
語文別:中文
論文頁數:80
中文關鍵詞:離散餘弦轉換特殊應用積體電路實際驗證遞迴演算法迴圈架構
外文關鍵詞:DCTASICimplementationrecursiveloop
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離散餘弦轉換(Discrete Cosine Transform; DCT)的高訊號密集度特性已普遍受到重視,並已實際應用於多媒體資訊壓縮系統中。目前雖有多種快速DCT、IDCT演算法被發展出來,惟在考量晶片面積、執行頻率及延遲時間等因素下,尚缺乏晶片實現之完整效能評估。本論文即就目前最常用的數種DCT演算法以平行(Parallel)及序列(Series)資料傳輸等方式處理,並依據MPEG標準探討並設計最適合該解壓縮方式的架構,再經由特殊應用積體電路實際驗證(Application Specific Integrated Circuit)來比較各種不同的架構。經由實際驗證結果,可提供實際應用中最佳演算法之選擇。

With the significant property of high signal density, discrete cosine transform (DCT) has been applied in many fields of digital signal processing. The design of the DCT or IDCT chips need to consider several important factors such as the chip area, running frequency and delay time. In this paper, we develop an architectures for DCT computation and compared with architectures that other authors presented before. The ASIC implementation for these DCT architectures is carry out by using Verilog hardware description language to synthesis the cell-based and an Altera Flex 10 k chip.

第一章前言…………………………………………………………...1-1
一、背景簡介……………………………………………………..1-1
二、研究動機……………………………………………………..1-6
三、論文架構……………………………………………………..1-8
第二章離散餘弦轉換及硬體實作誤差分析………………………...2-1
一、離散餘弦轉換之基本形態…………………………………2-1
1.DCT-I……………………………………………………...2-2
2.DCT-II……………………………………………………..2-5
3.DCT-III…………………………………………………….2-8
4.DCT-IV…………………………………………………...2-10
二、誤差分析…………………………………………………..2-11
1.帶符號數字系統…………………………………………2-11
2.2的補數數字系統………………………………………2-17
3.運算產生的誤差…………………………………………2-20
第三章離散餘弦轉換演算法………………………………………...3-1
一、參考快速複立葉轉換簡化離散餘弦轉換…………………3-1
1.經由時域簡化離散餘弦轉換……………………………..3-3
2.經由頻域簡化離散餘弦轉換……………………………..3-5
二、由矩陣的化簡、運算簡化離散餘弦轉換…………………..3-6
1.WHT快速演算法…………………………………………3-6
2.Lee快速演算法……………………………………………3-7
3.Hou快速演算法…………………………………………...3-8
三、其他方式…………………………………………………..3-10
1.DHT快速演算法………………………………………...3-10
2.Chang and Wu快速演算法………………………………3-11
3.Wang and Chen快速演算法……………………………..3-12
第四章特殊應用積體電路架構……………………………………...4-1
一、雙迴圈架構…………………………………………………4-1
二、自創性單迴圈架構…………………………………………4-3
三、與遞迴演算法之比較………………………………………4-5
四、平行輸入時各種演算法之比較……………………………4-6
五、序列輸入時各種演算法之比較……………………………4-8
六、硬體實作方式………………………………………………4-9
第五章模擬結果與驗證……………………………………………...5-1
一、 以Altera模擬與驗證結果之比較…………………………5-1
二、 以cell-based模擬與驗證結果之比較………………………5-4
第六章結論與未來研究方向………………………………………...6-1
參考文獻………………………………………………………………..r-1

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