臺灣博碩士論文加值系統

在高速基板設計中，傳輸線路是否特性阻抗匹配良好，將會造成訊號傳輸的品質優劣，設計良好的阻抗匹配能將高頻訊號傳送至負載點，而不能有訊號反射回來源點及造成雜訊，進而能提昇能源效益。
設計一個良好的傳輸線架構，除了需要了解相關影響特性阻抗的變異因素(線寛、線徑…etc)以外，而更要了解目前現有製程能力瓶頸，避免設計出來的基板是無法量產的。而由於差動訊號傳輸比單端信號傳輸更能抑制共模雜訊，非常適用於高速訊號的傳輸，所以本篇論文除了介紹基板製作過程，並藉由模擬軟體來設計模擬基板的特性阻抗，並實際量測基板上的差動傳輸線的特性阻抗，來分析探討傳輸線寛/徑、介質層及接地層對特性阻抗的影響，而達到設計最佳的特性阻抗。經由實際量測差動傳輸線間距180 um及175 um之測試載板，在實際載板上所呈現的差動特性阻抗是否符合設計規格 Z_diff=105+/-15 ohm，利用電性模擬軟體針對測試板切片所量測到的實際尺寸、厚度做差動特性阻抗之模擬與分析，在與量測的特性阻抗資料作比較。

Impedance matching would impact the quality of the signal transfer in the substrate design with high-speed signal transmission. Good impedance matching can design high-frequency signal transfer completely to the load point. Not reflect the signal back to the point of origin and cause noise, and thus enhance energy efficiency.
Design a transmission line structure, In addition to understanding all of the elements(Line width / Path...etc), we also have to understand the suppliers’ capabilities of substrate process. Differential signaling to suppress common mode noise is better than the single-ended signal transmission. So by simulating a substrate characteristic impedance from the Ansoft tool, and actually measuring differential signaling DOE (Design of Experiment) for 175/180 um substrate to verify the design rule of Z_diff=105+/-15 ohm.
To analysis dielectric and ground layer of characteristic impedance effect form the DOE, we can design the best impedance of substrate by controlling the transmission line, path and material.

中文摘要 -------------------------------------------------------------------------- i
英文摘要 -------------------------------------------------------------------------- ii
誌謝 -------------------------------------------------------------------------- iv
目錄 -------------------------------------------------------------------------- v
表目錄 -------------------------------------------------------------------------- vi
圖目錄 -------------------------------------------------------------------------- vii
第一章 緒論 -------------------------------------------------------------------- 1
1-1 特性阻抗詮釋 ------------------------------------------------------ 1
1-2 研究動機 ------------------------------------------------------------ 2
1-3 論文組織架構 ------------------------------------------------------ 4
第二章 基板技術簡介及傳輸線理論 -------------------------------------- 5
2-1 基板製程技術簡介 ----------------------------------------------- 5
2-2 傳輸線特性阻抗計算 -------------------------------------------- 15
2-3 單端傳輸線 -------------------------------------------------------- 20
2-4 差動傳輸線 -------------------------------------------------------- 22
2-5 阻抗匹配不良的後果 -------------------------------------------- 28
第三章 傳輸線特性阻抗實驗設計 ----------------------------------------- 29
3-1 時域反射儀原理 --------------------------------------------------- 29
3-2 基板結構選定 ------------------------------------------------------ 34
3-3 差動傳輸線實驗設計 --------------------------------------------- 35
第四章 實驗量測與模擬分析 ----------------------------------------------- 38
4-1 基板量測與切片驗證分析 --------------------------------------- 38
4-2 Ansoft 2D Extractor特性阻抗模擬 ------------------------------ 53
4-3 量測標準化 --------------------------------------------------------- 58
第五章 結論 -------------------------------------------------------------------- 63
參考文獻 -------------------------------------------------------------------------- 65

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