臺灣博碩士論文加值系統

這篇論文根據IEEE 802.16所制訂的標準，提出802.16d 實體層之電路設計。設計中整合了通道編解碼、OFDM 處理器、FFT/IFFT 模組，並實作出其餘的主要模組以完成整個實體層電路、並使用Stanford University Interim channel models來進行通道模擬。

本論文以Verilog HDL 進行實作，並使用MATLAB來進行實體層資料模擬、進行RTL 模擬、gate level 驗證。本論文採用Lattice 的 XP2EVB Emulation board 為FPGA 平台快速建立一個雛形系統。並於PC端使用C# 來測試傳送MATLAB 所產生的資料並以此讓傳送端、接收端可互相溝通及傳遞資料，以及比對其資料的正確性。

This thesis proposes according to IEEE 802.16 standards and mainly concentrates on the 802.16d OFDM physical layer, which is integrated with various key modules including Forward Error Correction, FFT/IFFT module, OFDM synchronous circuit and several other modules to constitute the entire base band system. And to make the main mould group of the rest in order to finish physical layer of circuit of the whole entity in fact, this model is implemented by Stanford University Interim channel models and frequency domain channel estimation is selected for this model.

This system has been implemented by Verilog HDL and verified against with the C-based behavior model, using MATLAB to implement of materials simulation of the entity, In addition, it will also be prototyped and optimized on the Lattice XP2EVB emulation board. And this system also uses C# to test and convey MATLAB materials produced and then convey to which receives the end for communication with each other and transmits the materials in PC end for comparison.

摘 要..........................................................i
Abstract.......................................................ii
目 錄........................................................iii
圖目錄..........................................................v
表目錄.......................................................viii
第一章、導論....................................................1
第二章、整體架構................................................3
(一) IEEE802.16d『實體層』(Physical Layer) 設定...............4
(二) 通道編解碼模式...........................................5
(三) 系統參數設定.............................................6
第三章、傳送端電路設計..........................................7
(一) Scrambler................................................8
(二) Reed-Solomon Encoder.....................................9
(三) Reed-Solomon Decoder....................................12
(四) Convolutional Encoding..................................14
(五) Punctured Codes.........................................15
(六) Interleaver/De-interleaver..............................16
(七) OFDM 技術簡介...........................................20
(八) Modulation..............................................21
(九) OFDM Processor for Transmitter..........................24
(十) 快速富利葉轉換概述......................................28
(十一) Cooley-Tukey 快速傅立葉轉換演算法.....................29
(十二) Burst I/O 運作原理....................................33
(十三) Bit Reversal..........................................34
第四章、Channel Model..........................................36
(一) SUI Channel models Implementation.......................38
第五章、接收端(Receiver side)電路..............................39
(一) OFDM Processor for Receiver.............................40
(二) Viterbi Algorithm.......................................41
(三) 編碼器狀態圖............................................42
(四) Viterbi Function Description............................44
(五) Mathematical formula of Viterbi Algorithm...............46
(六) Viterbi algorithm 的實際執行狀態........................47
第六章、硬體實作結果及驗證方式.................................52
第七章、結論及未來發展方向.....................................59
模擬結果.......................................................60
參考文獻.......................................................65

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