臺灣博碩士論文加值系統

本篇論文主要是研究在射頻積體電路中，利用本篇論文提出的新型修正電壓-電流轉換級，將中頻的可調式增益放大器與升頻器作一結合，透過電流模式的操作在同一級電路中同時實現可調式增益控制機制與頻率轉換機制。
我們使用TSMC 0.18μm CMOS與TSMC 0.35μm SiGe BiCMOS製程來實作應用於無線區域網路(WLAN)通訊系統與超寬頻(UWB)通訊系統具固定IF頻寬的可調式增益升頻器，其中為了在單晶片進行多個頻道訊號處理，同時也實現了應用於IEEE 802.11a/b/g WLAN通訊系統具固定IF頻寬的CMOS (2.4/5.7GHz)雙頻道可調式增益升頻器。

In this thesis, we focus on Radio Frequency Integrated Circuits. We combine IF variable gain amplifier with up-converter by using a new modified V-to-I transconductor stage, therefore, both frequency up-conversion and variable-gain amplification are achieved by using current-mode operation in a single chip.
We implement several variable gain up-converter with constant IF bandwidth for WLAN and UWB communication systems by using TSMC 0.18μm CMOS technology and TSMC 0.35μm SiGe BiCMOS technology. Moreover, in order to do multi-band multi-mode signal processing by a single chip, we also implement a CMOS dual-band (2.4/5.7GHz) variable gain up-converter with constant IF bandwidth for IEEE 802.11a/b/g applications.

第一章 導論 1
1.1 研究動機 2
1.2 論文組織 3
第二章 具固定IF頻寬的可調式增益升頻器 4
2.1 前言 5
2.2 可調式增益放大器 6
2.2.1 常見的可調式增益放大器 6
2.2.2 電壓放大器與電流放大器的分析與比較 8
2.3 可調式增益升頻器理論分析與架構 9
2.3.1 可調式增益升頻器基本原型 9
2.3.2 IF輸入級的架構與分析 10
2.4 實作一 5.2GHz可調式增益升頻器 28
2.4.1 研究動機 28
2.4.2 實作電路架構 28
2.4.3 量測結果 35
2.4.4 結論與討論 40
2.5 實作二 應用於Mode-1 MB-OFDM UWB可調式增益升頻器 41
2.5.1 研究動機 41
2.5.2 實作電路架構 42
2.5.3 量測結果 46
2.5.4 結論與討論 52
2.6 實作三 SiGe BiCMOS雙頻道可調式增益升頻器 53
2.6.1 研究動機 53
2.6.2 實作電路架構 53
2.6.3 量測結果 58
2.6.4 結論與討論 66
2.7 實作四 CMOS雙頻道可調式增益升頻器 67
2.7.1 研究動機 67
2.7.2 實作電路架構 67
2.7.3 量測結果 69
2.7.4 結論與討論 77
第三章 不同電路架構LO隔絕度之分析與比較 78
3.1 前言 79
3.2 埠對埠隔絕度的分析與理論 80
3.3 不同電路架構隔絕度的分析與比較 81
3.3.1 使用2μm GaInP/GaAs HBT製程實現的不同電路 81
3.3.2 不同電路架構隔絕度的分析 83
3.3.3 不同電路架構隔絕度的實測與比較 85
第四章 結論 93
參考文獻 96

[1] A. Italia et al., “A silicon bipolar transmitter frond-end for 802.11a and HIPERLAN2 wireless LANs,” IEEE J. Solid-State Circuits, vol. 40, no. 7, pp. 1451–1459, July 2005.
[2] H. D. Lee, C.-H. Kim, and S. Hong, “A SiGe BiCMOS transmitter module for IMT2000 applications,” IEEE Microw. Wireless Compon. Lett., vol. 14, no. 8, pp. 371-373, Aug. 2004.
[3] M. Zargari et al., “A 5-GHz CMOS transceiver for IEEE 802.11a wireless LAN systems,” IEEE J. Solid-State Circuits, vol. 37, no. 12, pp. 1688–1694, Dec. 2002.
[4] H. O. Elwan and M. Ismail, “Digitally programmable decibel-linear CMOS VGA for low-power mixed-signal applications,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 47, no. 5, pp. 388-398, May 2000.
[5] S. Otaka, H. Tanimoto, S. Watanabe, and T. Maeda, “A 1.9-GHz Si-bipolar variable attenuator for PHS transmitter,” IEEE J. Solid-State Circuits, vol. 32, no. 9, pp. 1424–1429, Sep. 1997.
[6] H. D. Lee, K. A. Lee, and S. Hong, “A wideband CMOS variable gain amplifier with an exponential gain control,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 6, pp. 1363-1373, June 2007.
[7] F. Carrara and G. Palmisano, “High-dynamic-range VGA with temperature compensation and linear-in-dB gain control,” IEEE J. Solid-State Circuits, vol. 40, no. 10, pp. 2019–2024, Oct. 2005.
[8] S. Otaka, G. Takemura, and H. Tanimoto, “A low-power low-noise accurate linear-in-dB variable-gain amplifier with 500-MHz bandwidth,” IEEE J. Solid-State Circuits, vol. 35, no. 12, pp. 1942–1948, Dec. 2000.
[9] C. D. Presti, F. Carrara, and G. Palmisano, “Variable-gain up-converter with current reuse for 5-GHz WLAN applications,” Analog Integrated Circuits and Signal Processing, vol. 51, no. 1, pp. 51–54, Apr. 2007.
[10] T.-M. Chen et al., “A low-power fullband 802.11a/b/g WLAN transceiver with on-chip PA,” IEEE J. Solid-State Circuits, vol. 42, no. 2, pp. 983–991, Feb. 2007.
[11] P. Zhang et al., “A single-chip dual-band direct-conversion IEEE 802.11a/b/g WLAN transceiver in 0.18-um CMOS,” IEEE J. Solid-State Circuits, vol. 40, no. 9, pp. 1932–1939, Sep. 2005.
[12] B. Gilbert, “The MICROMIXER: A highly linear variant of the Gilbert mixer using a bisymmetric Class-AB input stage,” IEEE J. Solid-State Circuits, vol. 32, no. 9, pp.1412-1413, Sept. 1997.
[13] P. R. Gray, P. J. Hurst, S. H. Levis, and R. G. Meyer, Analysis and design of analog integrated circuits, New York: John Willey & Sons, 2001.
[14] B. Gilbert, “A precise four-quadrant multiplier with subnanosecond response,” IEEE J. Solid-State Circuits, vol. sc-3, no. 4, pp.365-373, Dec. 1968.
[15] F. Corsi, C. Marzocca, and G. Matarrese, “On impedance evaluation in feedback circuits,” IEEE Trans. Educ., vol. 45, no. 4, pp. 371-379, Nov. 2002.
[16] C. C. Meng and T.-H. Wu, “Compact 5.2-GHz GaInP/GaAs HBT Gilbert upconverter using lumped rat-race hybrid and current combiner,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 10, pp. 688-690, Oct. 2005.
[17] C. D. Hull and G. B. Meyer, “Principles of monolithic wideband feedback amplifier design,” Int. J. High Speed Electron., vol. 3, pp. 53-93, Feb. 1992.
[18] R. G. Meyer and R. A. Blauschild, “A 4-terminal wide-band monolithic amplifier,” IEEE J. Solid-State Circuits, vol. sc-16, no. 6, pp.634-638, Dec. 1981.
[19] R. G. Meyer, R. Eschenbach, and R. Chin, “A wide-band ultralinear amplifier from 3 to 300MHz,” IEEE J. Solid-State Circuits, vol. sc-9, no. 4, pp.167-175, Aug. 1974.
[20] S.-S. Lu et al., “The determination of S-parameters from the poles of voltage-gain transfer function for RF IC design,” IEEE Trans. Circuit and Systems-I, vol. 52, no. 1, pp. 191-199, Jan. 2005.
[21] M.-C. Chiang et al., “Analysis, design, and optimization of InGaP-GaAs HBT matched-impedance wide-band amplifiers with multiple feedback loops,” IEEE J. Solid-State Circuits, vol. 37, no. 6, pp.694-701, Jun. 2002.
[22] J.-S. Syu and C. C. Meng, “2.4/5.7 GHz dual-band high linearity Gilbert upconverter utilizing bias-offset TCA and LC current combiner,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 12, pp. 876-878, Dec. 2007.
[23] A. A. Abidi, “Direct-convertion radio transceivers for digital communications,” IEEE J. Solid-State Circuits, vol. 30, no. 12, pp. 1399-1410, Dec. 1995.
[24] J. Choma, Jr, “A three-level broad-banded monolithic analog multiplier,” IEEE J. Solid-State Circuits, vol. SC-16, no. 4, pp. 392-399, Aug. 1981.
[25] L. Sheng, J. C. Jensen, and L. E. Larson, “A wide-bandwidth Si/SiGe HBT direct conversion sub-harmonic mixer/downconverter,” IEEE J. Solid-State Circuits, vol. 35, no. 9, pp. 1329-1337, Sept. 2000.
[26] V. Puyal et al., “A DC-100 GHz frequency doubler in InP DHBT technology,” in IEEE MTT-S Int. Dig., Fort Worth, TX, 2004, pp. 167–170.
[27] A. W. Buchwald et al., “A 6-GHz integrated phase-locked loop using AlGaAs/GaAs heterojunction bipolar transistors,” IEEE J. Solid-State Circuits, vol. 27, no. 12, pp. 1752–1762, Dec. 1992.
[28] R. Magoon et al., “A singlechip quad-band (850/900/1800/1900 MHz) direct conversion GSM/GPRS RF transceiver with integrated VCOs and franctional-N synthesizer,” IEEE J. Solid-State Circuits, vol. 37, no. 12, pp. 1710–1720, Dec. 2002.
[29] 吳宗翰, “利用金氧半場效電晶體，鍺化矽電晶體，和磷化銦鎵/砷化鎵異質接面電晶體技術之射頻吉伯特混頻器及接收機系統架構,” 交通大學博士論文, 2007.
[30] T. H. Wu et al., “GaInP/GaAs HBT sub-harmonic Gilbert mixers using stacked-LO and leveled-LO topologies,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 5, pp. 880-889, May. 2007.
[31] T. H. Wu and C. C. Meng, “10-GHz highly symmetrical sub-harmonic Gilbert mixer using GaInP/GaAs HBT technology,” IEEE Microw. Wireless Comp. Lett., vol. 17, no. 5, pp. 370-372, May. 2007.