臺灣博碩士論文加值系統

為了能正確且迅速繪製出場景透明度的效果，現今電腦圖學領域中提出了順序獨立透明計算之演算法，並配以額外透明畫素片段儲存系統之支援，以進一步降低演算法所需執行時間。然而，隨著現今對於高畫質場景的要求愈來愈高的情況下，場景中具透明度像素片段之數目亦日漸增加，其所需儲存空間亦日漸增大。如何能降低該儲存容量之需求，成為值得研究之議題。本論文針對順序獨立透明計算，提出一畫素片段儲存系統之設計：依畫素片段之螢幕座標位置，將畫素片段擺放至儲存系統中相對應的位址，並利用指標索引方式，將具相同螢幕座標之畫素片段串連起來，達到節省系統儲存空間、降低對儲存系統存取之次數、快速存取同螢幕座標畫素片段及之目的。

In order to correctly and fast render the transparent effect of a scene, some hardware oriented algorithms with additional transparent fragment storage supports for order-independent transparency are proposed in current computer graphics. However, as the scene complexity is constantly increasing, the number of transparent fragments and the size of transparent fragment storage support also increase significantly. To lower the demand for memory, in this thesis, we propose a transparent fragment storage system design for order-independent transparency. Within our fragment storage system, transparent fragments are stored in a corresponding location based on their x-y coordinate, and connected with the other fragments that has the same x-y coordinate by pointer indexing. The objective of our design is to reduce the memory requirement and the memory access frequency of the transparent fragment storage system.

摘 要 ii
Abstract iii
誌謝 iv
Table of Contents v
List of Figures vi
Chapter 1 Introduction 1
Chapter 2 Background and Related work 3
2.1 Graphics pipeline 3
2.2 Transparency and alpha blending 4
2.3 Transparency rendering problem 5
2.4 Order-independent transparency 6
2.5 Related works 7
2.5.1 R-Buffer hardware architecture 7
2.5.2 Hardware oriented algorithm based on weight factors computations 9
Chapter 3 Design 14
3.1 Design overview 14
3.2 Transparent Fragment Storage System 15
3.2.1 Statistics and observation for the distribution of transparent fragment 15
3.2.2 The structure of transparent fragment storage system 17
3.2.3 The access process of transparent fragment storage system 20
3.3 Leading 0s elimination 23
3.3.1 Statistics and observation of fragment data length 23
3.3.2 Main idea of leading 0s elimination 25
3.3.3 Example of leading 0s elimination 27
Chapter 4 Evaluation Results 28
4.1 Evaluation environment 28
4.2 Test frame data 30
4.3 Simulation results 31
4.3.1 Memory requirement 31
4.3.2 time requirement 35
Chapter 5 Conclusion and Future Work 39
5.1 Conclusion 39
5.2 Future work 39
References 41
Appendix A. Simulation Test Frame Images 43

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