臺灣博碩士論文加值系統

近年來，隨著網路頻寬提昇以及科技的進步，多媒體影音的產品及服務不斷推陳出新，如：3G手機的MMS（Multimedia Message Service）服務、中華電推出的MOD（Multimedia On Demand）、視訊會議（Video Conferencing）、數位電視（Digital TV）等等，都是需要一個良好的壓縮標準的支持，無法直接將原始資料在網路上傳遞，而運動估計（Motion Estimation）則是在整個影像壓縮中佔最大的計算比例，因此我們的研究都將針對減少運動估計中比對方塊（Candidate Block）的數目以及維持一定影像品質來進行。
我們分析多種運動估計的快速演算法及硬體架構，以階層式動作搜尋（Hierarchical Motion Estimation）為基礎，設計一個能夠滿足HDTV規格中720P每秒30張畫面的解析度，在不耗費過多的硬體資源以及能維持一定的影像品質下，提出一個有效率的硬體架構來加速運動估計的執行效能。首先我們觀察到，對於兩個鄰近的巨方塊（MacroBlock）會有相類似的運動向量預測（Motion Vector Predictor），利用這個特性，我們規劃一個16x8處理單元陣列（Processing Element Array），每次的搜尋是以兩個相鄰的巨方塊為單位，可以在階層式搜尋中大量減少時脈，並且可以保有一定的影像品質。
另外我們也將針對影像移動的快慢，提出一個動態調整搜尋範圍（Adaptive Search Range）的預測方法，能夠準確的反應影像的特性在巨方塊層級上，預估所要搜尋的範圍，減少比對方塊的數目，去除不必要的運算量，並且能夠維持極高的影像品質，透過實作在新的壓縮標準H.264/AVC軟體程式上，測試我們的預測方法，實驗結果幾乎接近完全搜尋的壓縮品質，以及討論H.264運動估計特點的影響。

Due to the progress of Internet technology and technical improvement, the growths of multimedia products and services ,such as Multimedia Message Service（MMS）, Multimedia on Demand（MoD）, Video Conferencing, and Digital TV, are very fast. All of these services need good video compression and audio compression standards to support. It is impossible to transmit source data of multimedia on networks. Motion Estimation needs the most computing complexity in the video compression. In our research, we focus on how to reduce candidate blocks and keep video quality.
We study some fast motion estimation algorithms and architectures, and design a fast motion estimation architecture which supports resolution of 1280x720 at 30fps frame rate in HDTV specification based on hierarchical motion estimation algorithm. In the limit of hardware resources and the compressed video quality, the architecture can improve inter-coding performance. Two adjacent MacroBlocks have similar Motion Vector in our observation. We arrange a 16x8 processing element array to deal with two adjacent MacroBlocks together. The design can reduce a lot of clock cycles in the hierarchical motion estimation architecture, and keep high video quality.
Furthermore, we propose a search range prediction method（called ASR）which reflect the motion behavior of video sequences into search range on MB-By-MB Basis. ASR can reduce the unnecessary operation of candidate blocks and keep very high video quality compared with Full Search Block Matching algorithm by the implementation in official software of the new video compression standard, Joint Model of H.264/AVC.

目錄
中文摘要 i
英文摘要 ii
目錄 iii
圖目錄 v
表目錄 vi
一、序論 1
1.1研究動機 1
1.2研究目標 1
1.3研究貢獻 1
1.4內容編排 2
二、背景知識 3
2.1基本概念 3
2.2完全搜尋演算法 5
2.3半像素搜尋 6
2.4快速演算法與加速技巧 7
2.5快速硬體架構 8
2.6記憶體頻寬分析 11
2.7在計算受限制環境之運動估計 13
2.7.1 Computation Constrained Block-Based Motion Estimation 13
2.7.2 Complexity-Adaptive Search Algorithm 14
2.8動態調整搜尋範圍演算法 16
2.8.1 DSWA/IS 16
2.8.2 Context Adaptive Search 16
2.8.3 Window Follower Approach 17
2.9.4 Modified Window Follower 18
2.9 H.264/AVC壓縮標準 19
2.9.1 H.264之運動估計 19
2.9.2 H.264/AVC測試與分析 21
三、架構設計 25
3.1硬體架構設計 25
3.2搜尋步驟 26
3.3效能分析 28
四、動態搜尋範圍 33
4.1搜尋範圍與比對個數 33
4.2動態搜尋範圍 34
4.3實驗結果 38
4.4 H.264討論 40
五、結論與未來展望 42
六、參考文獻 43

[1] 戴顯權，“多媒體通訊”，紳藍出版社，2001

[2] Iain E.G. Richardson, “Video Codec Design: Developing Image and Video Compression Systems”, Wiley, 2002

[3] “H.264 / MPEG-4 Part 10 Tutorials”, http://www.vcodex.fsnet.co.uk/h264.html

[4] T. Wiegand, G. J. Sullivan, G. Bjntegaard, and A. Luthra, ”Overview of The H.264/AVC Video Coding Standard”, IEEE Transactions on Circuits and Systems for Video Technology, Volume: 13, Issue: 7, Pages: 560 – 576, July 2003

[5] Iain E.G. Richardson，“H.264 and MPEG-4 Video Compression: Video Coding for Next Generation Multimedia”, Wiley, 2004

[6] G. J. Sullivan, T. Wiegand, ”Joint Model Reference Encoding Methods and Decoding Concealment Methods”, JVT-I049d0.doc, Joint Video Team (JVT) of ISO/IEC MPEG and ITU-T VCEG San Diego, USA, September, 2003

[7] Zhibo Chen, Peng Zhou, Yun He, “Fast Integer Pel and Fractional Pel Motion Estimation for JVT”, JVT-F017r1.doc, Joint Video Team (JVT) of ISO/IEC MPEG & ITU-T VCEG, 6th meeting, Awaji, Island, JP, 5-13 December, 2002

[8] Zhibo Chen, etc. “Hybrid Unsymmetrical-cross Multi-Hexagon-Grid Search Strategy for Integer Pel Motion Estimation in H.264”, Picture Coding Symposium, 2003, April, Saint_Malo, France

[9] L. D. Vos and M. Stegherr, “Parameterizable VLSI Architecture for the Full-Search Block-Matching Algorithm”, IEEE Transaction on Circuits and Systems, Volume 36, No. 10, Pages: 1309-1316, Oct. 1989.

[10] T. Komarek and P. Pirch, “Array Architectures for Block Matching Algorithms”, IEEE Transaction on Circuits and Systems, Volume 36, No.10, Pages: 1301-1308, Oct. 1989.
[11] C. H. Hsieh, T. P. Lin, “VLSI Architecture for Block-Matching Motion Estimation Algorithm”, IEEE Transaction On Circuits and Systems for Video Technology, Volume 2, No. 2, Pages: 169-175, June. 1992.

[12] S. B. Pan, S. S. Chae, R.-H. Park, ”VLSI Architectures for Block Matching Algorithms Using Systolic Arrays”, IEEE Transactions on Circuits and Systems for Video Technology, Volume 6, Issue. 1, Pages: 67 – 73, Feb. 1996

[13] J. H. Lee, K. W. Lim, B. C. Song, and J.B. Ra, “A Fast Multi-Resolution Block Matching Algorithm and Its LSI Architecture for Low Bit-Rate Video Coding”, IEEE Transactions on Circuits and Systems for Video Technology, Volume 11, No. 12, Pages: 1289-1301, December 2001.

[14] X. Song, T. Chiang, X. Lee, and Y. Q. Zhang, “New Fast Binary Pyramid Motion Estimation for MPEG2 and HDTV Encoding”, IEEE Transactions on Circuits and Systems for Video Technology, Volume 10, No. 7, Pages: 1015-1028, October 2000.

[15] Y. K. Lai, L. G. Chen, T. H. Tsai, P. C. Wu, ”A Flexible High-Throughput VLSI Architecture with 2-D Data-Reuse for Full-Search Motion Estimation”, International Conference on Image Processing, Proceedings. Volume 2, Pages: 144 - 147, 26-29 Oct. 1997

[16] Joint Model, Reference Software of JVT http://bs.hhi.de/~suehring/tml/

[17] Xvidcore-1.0.0-rc3, Xvid Software http://www.xvid.org

[18] Gallant, M.; Kossentini, F., “An Efficient Computation-Constrained Block-Based Motion Estimation Algorithm for Low Bit Rate Video Coding”, Conference Record of the Thirty-Second Asilomar Conference on Signals, Systems & Computers, Volume 1, Pages: 467 - 471, 1-4 Nov. 1998

[19] Pol Lin Tai; Chii-Tung Liu; Jia-Shung Wang, ”Complexity-Adaptive Search Algorithm for Block Motion Estimation”, International Conference on Image Processing, Volume: 2, Pages: 969 – 972, 7-10 Oct. 2001

[20] Liang-Wei Lee; Jing-Fa Wang; Jau-Yien Lee; Shie, J.-D., “Dynamic Search-Window Adjustment and Interlaced Search for Block-Matching Algorithm”, IEEE Transactions on Circuits and Systems for Video Technology, Volume: 3, Issue: 1, Pages: 85 – 87, Feb. 1993

[21] S. Kim and C. –C J. Kuo, “A Stochastic Approach for Motion Vector Estimation in Video Coding”, SPIE’s 1994 Annual Meeting, San Diego, California, July 24-29, 1994

[22] Hyun Mun Kim; Acharya, T., ”CAS: Context Adaptive Search for Motion Estimation”, International Conference on Information Technology: Coding and Computing, Proceedings, Pages: 202 - 206, 2-4 April 2001

[23] Minocha, J.; Shanbhag, N.R., “A Low Power Data-Adaptive Motion Estimation Algorithm”, 1999 IEEE 3rd Workshop on Multimedia Signal Processing, Pages: 685 – 690, 13-15 Sept. 1999

[24] Saponara, S.; Fanucci, L., ”Data-Adaptive Motion Estimation Algorithm and VLSI Architecture Design for Low-Power Video Systems“, Computers and Digital Techniques, IEE Proceedings, Volume: 151, Issue: 1, Pages: 51 – 59, Jan. 2004

[25] Yu-Wen Huang; Bing-Yu Hsieh; Tu-Chih Wang; Shao-Yi Chient; Shyh-Yih Ma; Chun-Fu Shen; Liang-Gee Chen, “Analysis and Reduction of Reference Frames for Motion Estimation in MPEG-4 AVC/JVT/H.264”, IEEE International Conference on Acoustics, Speech, and Signal Processing, Proceedings, (ICASSP ''03), Volume: 3, Pages: III - 145-8, 6-10 April 2003

[26] Jen-Chieh Tuan; Tian-Sheuan Chang; Chein-Wei Jen, “On the Data Reuse and Memory Bandwidth Analysis for Full-Search Block-Matching VLSI Architecture”, IEEE Transactions on Circuits and Systems for Video Technology, Volume: 12, Issue: 1, Pages: 61-72, Jan. 2002