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研究生:陳玄儒
研究生(外文):Hsuan-JuChen
論文名稱:光獵能系統之三開關單電感雙輸入降壓/升壓轉換器
論文名稱(外文):A Three-Switch Single-Inductor Dual-Input Buck/Boost Converter for Light Energy Harvesting
指導教授:郭泰豪
指導教授(外文):Tai-Haur Kuo
學位類別:碩士
校院名稱:國立成功大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2014
畢業學年度:103
語文別:英文
論文頁數:91
中文關鍵詞:光獵能系統能量回收最大功率追蹤功率流向無線感測網路單電感電源轉換器低功耗控制電路
外文關鍵詞:Light energy harvestingEnergy-recycleMPPTPower flowWSNsSingle inductor power converter:Low power control circuit
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本論文研發適用於消耗性電子產品如無線感測網路系統的獵能晶片。透過擷取環境能源並結合二次電池,系統得以達到接近永久自主的操作。經由太陽能電池擷取環境光源是一個常見的方法。在這個系統,當擷取到的環境光源能量無法提供負載足夠能量時,電池扮演著輔助的角色,另一方面,當光源能量足夠提供負載時,電池儲存多餘能量以備日後所需。因此,一個典型的光獵能無線感測系統包含了太陽能電池、儲能元件以及負載端應用,而如何有效分配三者元件間能量是個重要的議題。有別於傳統使用兩級電源轉換器或多輸入多輸出電源轉換器的實現方式,本論文提出一個能量回收的概念並實現其對應的轉換器架構,使用了更少的元件數而能夠達到能量平衡,透過功率電晶體的最佳化,使得整體轉換效率優於現有技術。最後,對應於提出之轉換器架構的電壓穩壓控制電路以及最大功率追蹤器亦於本論文中做討論。
此光獵能晶片是使用台灣積體電路製造股份有限公司所提供的0.35μm 2P4M 3.3V/5V混合訊號互補式金氧半製程來製造。全晶片面積為0.79mm2,而有效面積為0.5mm2,小於現有文獻所實現的面積至少30%。量測結果顯示整體轉換效率最高為93%,優於現有技術至少12%。此外,與現有文獻相比,此研究亦在負載全範圍擁有最高的整體轉換效率以滿足無線感測網路系統對電源供應效率及體積的需求。
The design and analysis of energy harvesting (EH) for consumer electronics such as wireless sensor networks (WSNs) is presented in this thesis. The system can be powered by ambient energy in conjunction with rechargeable batteries to achieve near-perpetual operation. One common solution is to harvest energy from ambient light through photovoltaic (PV) modules. In such a system, a battery acts as the backup source to supplement energy when the environment’s power provision is insufficient or when the WSN is active, and stores surplus energy for future use when the WSN is inactive. Accordingly, power management in an EH system involves a balance among the PV module, battery and load. Compared to traditional methods which use two stage dc-dc converter or multi-input multi-output topology, an energy-recycling concept is proposed and the corresponding converter is implemented in this thesis. It uses fewer switches to balance the power among three elements. Additionally, the sizes of switches are optimized for reducing power losses. Consequently, compared with state-of-the-arts, both the power loss and chip area can be simultaneously reduced. Finally, the corresponding voltage regulator with maximum power point tracking are also proposed in this thesis.
The proposed EH integrated circuit (IC) is fabricated with TSMC 0.35μm 2P4M 3.3V/5V Mixed-Signal CMOS process. The total chip area is 0.79mm2, and the active area is 0.5mm2 which is at least less than 30% compared to state-of-the-arts. Measured result shows that this IC features 93% peak conversion efficiency, which is 12% higher compared to state-of-the-arts. Moreover, this work also has higher efficiency over the entire load power range than current state-of-the-arts to meet the power- and volume-efficient requirements of WSNs.
摘要 I
Abstract II
Acknowledgement III
Table of Contents IV
List of Tables VII
List of Figures VIII
Chapter 1 Introduction 1
1.1 Background 1
1.2 Motivation 3
1.3 Organization 6
Chapter 2 Fundamentals of Light Energy Harvesting 7
2.1 Photovoltaic module 7
2.1.1 Characteristic 7
2.1.2 Material 9
2.2 Energy storage 11
2.3 Wireless sensor networks 14
2.4 Power management 15
2.4.1 Power flow and converter architecture 17
2.4.2 Modulation method 18
2.4.3 Maximum power point tracking (MPPT) 22
Chapter 3 System Design and Analysis 25
3.1 Power flow analysis 25
3.1.1 Possible power flow 25
3.1.2 Converter architecture 26
3.1.3 Selection of power flow 29
3.2 Proposed three-switch single-inductor dual-input buck/boost converter 35
3.2.1 Operation principle 35
3.2.2 Voltage regulation 37
3.2.3 Operating range of PV module and load 41
3.2.4 Power MOS sizing 44
3.3 Modulation flow 49
Chapter 4 Circuit Design 51
4.1 System block diagram 51
4.2 High voltage selector (HVS) 53
4.3 Gate driver 55
4.4 Maximum power point tracking 57
4.5 Voltage regulator 60
4.5.1 Feedback comparator 61
4.5.2 Mode selector 64
4.5.3 On-time generator 65
4.5.4 Off-time generator 66
4.6 Oscillator 68
4.6.1 Current starved ring oscillator 68
4.6.2 Self-oscillation mechanism 71
4.7 Bias circuit 72
4.7.1 Circuit architecture 72
4.8 Simulation result 74
4.8.1 Power on response 74
4.8.2 Load transient response 75
Chapter 5 Layout and Measured Setup 78
5.1 Layout and die photo 78
5.2 Test environment 80
5.3 Measurement result 81
5.3.1 Chip micrograph 81
5.3.2 Load transient response and efficiency 82
5.3.3 Power on response 84
5.3.4 Maximum power point tracking 84
5.4 Comparisons 85
Chapter 6 Conclusion and Future Work 86
6.1 Conclusions 86
6.2 Future works 87
Reference 88
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