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研究生:黃家緯
論文名稱:析鍍條件對銲錫隆點底層金屬無電鍍鎳之成長與擴散障礙行為之影響
論文名稱(外文):The Influence of Different Deposition Conditions on the Growth and Properties of Electroless Ni Plating as the UBM of Solder Bump
指導教授:林光隆
學位類別:碩士
校院名稱:國立成功大學
系所名稱:材料科學及工程學系
學門:工程學門
學類:材料工程學類
論文種類:學術論文
論文出版年:2000
畢業學年度:88
語文別:中文
論文頁數:107
中文關鍵詞:無電鍍鎳擴散障礙層銲錫隆點銲錫隆點底層金屬界面金屬間化合物硫尿
外文關鍵詞:Electroless Nickel PlatingDiffusion BarrierSolder BumpUnder Bump MetallurgyIntermetallic CompoundThiourea
相關次數:
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本研究係討論無電鍍鎳不同析鍍條件對其鍍層性質,及作為銲錫隆點銅鍍層與銲錫層之間擴散障礙層行為的影響。本實驗在無電鍍鎳鍍液中添加硫尿及醋酸鉛為穩定劑,且改變其含量與鍍液的pH值,再量測各條件所析鍍出來的無電鍍鎳鍍層性質,之後將其析鍍在銅與鉛錫層之間,經多次重流與高溫時效熱處理後,分析元素間的擴散行為,以期獲得最佳擴散障礙層無電鍍鎳之析鍍條件;另外比較三種析鍍無電鍍鎳隆點時鍍液的攪拌方式,分析攪拌方式對無電鍍鎳隆點析鍍速率、鍍層均勻性及鍍層性質的影響,並試圖找出最好的攪拌條件。
實驗結果發現在在無電鍍鎳鍍液中添加硫尿為穩定劑,會使無電鍍鎳反應析鍍速率大幅增加;添加醋酸鉛為穩定劑,其析鍍速率與未加穩定劑相差不大。而在pH值的影響方面,不論穩定劑為何,其析鍍速率都會隨著pH值的增加而增加。不過當穩定劑添加量都超過2ppm時,會降低析鍍速率。
在鍍液中添加硫尿所析鍍出的無電鍍鎳鍍層經能量光譜儀及XRD分析發現,鍍層磷含量均低於7wt%,其結構均為結晶結構。而添加醋酸鉛所析鍍出的無電鍍鎳鍍層,在鍍液pH值小於4.6的情形下,其鍍層磷含量均高於7wt%,鍍層結構均為非晶質結構;當鍍液pH值大於4.6時,其鍍層磷含量會低於7wt%,鍍層結構會轉變成結晶結構。另外分析鍍層表面形態發現,添加硫尿會使鍍層晶粒變大、表面變粗糙;添加醋酸鉛則與未加穩定劑的表面形態差異不大。
在研究鍍液攪拌方式對無電鍍鎳隆點成長及其性質影響的實驗上,發現攪拌子攪拌與平置不攪拌都會因為氫氣泡的吸附而影響無電鍍鎳隆點的表面平整性。但幫浦間斷攪拌可以順利祛除吸附在光阻上的氣泡,析鍍出表面平坦均勻的無電鍍鎳隆點,且經剪力測試後發現,其與銅鍍層之間的附著性良好。
在擴散障礙實驗中發現,無電鍍鎳層會與鉛錫層之間形成Ni3Sn4與Ni3Sn2的金屬間化合物,且在無電鍍鎳層中靠近金屬間化合物的一邊,會形成一層連續的Ni3P的結晶相。不論穩定劑為硫尿或是醋酸鉛的無電鍍鎳1μm經五次重流後,銅原子會穿過無電鍍鎳層與鎳、錫形成(Cu,Ni)6Sn5的金屬間化合物;而3μm與5μm的無電鍍鎳層,經十次重流或是一次重流再經高溫時效處理1000小時後,銅、錫原子都無法穿過無電鍍鎳層。顯示不論穩定劑為何,只需要析鍍無電鍍鎳3μm,就足以作為銅與銲錫層之間良好的擴散障礙層。
The objective of this research was to determine the impact of different deposition conditions on the electroless Ni plating and its diffusion barrier properties as the UBM for solder bump. Experimentally the concentration of stabilizers, Thiourea or Lead Acetate, and the pH of plating solution were investigated to analyze the properties of electroless Ni. It was also investigated the barrier behavior of the Cu/Ni-P/63Sn-37Pb during multi-reflow and 150℃ heat aging for 1000 hours to find out the suitable deposition condition. The properties of Ni bumps were also analyzed respect to with different stiring method.
The experimental results revealed that the addition of Thiourea increases the deposition rate of Ni plating, but the addition of Lead Acetate does not show such behavior. The deposition rate increased with pH of plating solution regardless of Thiourea or Lead Acetate. However, the deposition rate may decrease when the concentration of stabilizer is over 2ppm.
The structure of Ni-P deposit plated in the presence of Thiourea was crystalline with less than 7 wt% P. When the pH of plating solution is below 4.6, the structure of Ni-P deposit plated in the presence of Lead Acetate was amorphous with over 7 wt% P, while a crystalline structure was obtained when P content is less than 7 wt%. The addition of Thiourea enlarge the grain size of electroless Ni-P, but not the Lead Acetate .
The Ni Bump with flat surface could be deposited by interval pumping; the adhesion strength between Ni/Cu is strong.
The intermatallic compounds formed during reflow or aging between the Ni/63Sn-37Pb are Ni3Sn4 and Ni3Sn2. Besides the IMC, the electroless Ni formed a continuous layer of Ni3P. Cu did not penetrate Ni-P layer with Cu/Ni-P(3μm)/ 63Sn-37Pb and Cu/Ni-P(5μm)/ 63Sn-37Pb after 10 reflows and aging for 1000 hrs regardless of stabilizer.
總目錄
中文摘要……………………………………………………………...Ⅰ
英文摘要……………………………………………………………...Ⅲ
總目錄………………………………………………………………...Ⅴ
表目錄………………………………………………………………...Ⅷ
圖目錄………………………………………………………………...Ⅸ
第壹章 簡介…………………………………………………………....1
1-1電子構裝技術………………………………………………… ....1
1-1-1電子構裝的分級………………………………………… ....1
1-2覆晶接合技術………………………………………………… ....3
1-3銲錫隆點材料………………………………………………… ....6
1-4無電鍍鎳……………………………………………………… ....9
1-4-1無電鍍鎳的沿革與發展………………………………… ....9
1-4-2無電鍍鎳鍍液組成及特性……………………………… ..10
1-4-3無電鍍鎳之原理………………………………………… ..11
1-4-4無電鍍鎳之性質及其在電子構裝上的應用…………… ..12
1-4-5擴散障礙層的原理……………………………………… ..14
1-5研究目的……………………………………………………… ..16
第貳章 實驗方法與步驟……………………………………………..19
2-1實驗構想……………………………………………………… ..19
2-2析鍍無電鍍鎳鍍層…………………………………………… ..21
2-2-1基材前處理……………………………………………… ..21
2-2-2配製無電鍍鎳鍍液……………………………………… ..21
2-2-3析鍍無電鍍鎳磷鍍層…………………………………… ..23
2-3析鍍無電鍍鎳隆點…………………………………………… ..23
2-3-1矽晶片前處理…………………………………………… ..23
2-3-2濺鍍鉭、銅鍍層………………………………………… ..25
2-3-3微影製程………………………………………………… ..25
2-3-4不同攪拌方式析鍍無電鍍鎳隆點……………………… ..25
2-4 擴散障礙效果實驗………………………………………….. ..28
2-4-1 電鍍鉛錫合金…………………………………………... ..28
2-4-2 銲錫重流………………………………………………... ..28
2-4-3 高溫時效處理………………………………………… ..31
2-5無電鍍鎳鍍層性質的分析…………………………………… ..31
2-5-1析鍍速率之量測………………………………………… ..31
2-5-2鍍層結構之分析………………………………………… ..31
2-5-3鍍層表面形態分析……………………………………… ..31
2-5-4鍍層組成之分析………………………………………… ..34
2-6無電鍍鎳隆點性質的分析…………………………………… ..34
2-6-1隆點析鍍速率、均勻性之分析…………………………. ..34
2-6-2隆點外觀之分析………………………………………… ..34
2-6-3隆點組成之分析………………………………………… ..34
2-6-4隆點剪力強度之分析…………………………………… ..34
2-7 無電鍍鎳之擴散障礙行為與界面反應分析……………….. ..36
2-7-1 鍍層擴散障礙效果之測試……………………………... ..36
2-7-2 鍍層與銲錫之金屬間化合物結晶相分析……………... ..36
第參章 結果與討論…………………………………………………..37
3-1銅基材表面活化……………………………………………… ..37
3-2無電鍍鎳鍍層性質…………………………………………… ..37
3-2-1穩定劑添加量對無電鍍鎳析鍍速率的影響…………… ..37
3-2-2鍍液pH值對無電鍍鎳析鍍速率的影響………………. ..38
3-2-3無電鍍鎳鍍層結構之分析……………………………… ..41
3-2-4無電鍍鎳鍍層成份之分析……………………………… ..49
3-2-5穩定劑對鍍層表面形態的影響………………………… ..53
3-3無電鍍鎳隆點的成長及其性質分析………………………… ..57
3-3-1攪拌子攪拌對無電鍍鎳隆點表面形態的影響………… ..57
3-3-2平置不攪拌對無電鍍鎳隆點表面形態的影響………… ..57
3-3-3幫浦間斷攪拌對無電鍍鎳隆點表面形態的影響……… ..60
3-3-3-1幫浦on/off時間對無電鍍鎳隆點表面形態的影響.. ..64
3-3-3-2幫浦on/off時間影響無電鍍鎳隆點表面形態的原因……..64
3-3-4幫浦間斷攪拌析鍍之無電鍍鎳隆點性質分析………… ..69
3-4 擴散障礙效果及界面反應分析…………………………….. ..74
3-4-1 無電鍍鎳厚度與擴散障礙層的關係…………………... ..74
3-4-2 金屬間化合物的形成…………………………………... ..80
3-4-3 鍍層厚度、性質與擴散障礙效果的分析……………… ..80
3-4-4 界面金屬間化合物的結晶相分析……………………... ..91
3-4-5 界面金屬間化合物的表面形態及化學組成…………... ..95
第肆章 結論…………………………………………………………101
參考資料……………………………………………………………..102
1.J. H. Lau, Electronic Packaging Design Materials and Reliability, McGraw-Hill, New York, 1998, Chapter 1.
2.D. P. Seraphim, R. C. Lasky and Che-Yu Li, Principles of Electronic Packaging, McGraw-Hill, New York, 1989, Chapter 1.
3.呂宗興, “電子構裝技術的發展歷程”, 工業材料115期, 1996, pp. 49~53.
4.M. R. Pinnel and W. H. Knausenberger, "Interconnection System Requirements and Modeling", AT&T Tech. Journal, Vol.66, No.4, 1987, pp.45-56.
5.Rudolf Strauss, SMT soldering handbook, Newnes, New York , 1998
6.J. H. Lau, Ball Grid Array Technology, McGraw-Hill, New York, 1995, Chapter 1.
7.劉秀琴, “SMT/裸晶/構裝的技術現況與問題”, 工業材料118期, 1996, pp. 70~77.
8.李宗銘, “異方性導電膠材料技術與應用”, 工業材料147期, 1999, pp. 93~98.
9.林光隆, 多晶片模組電子構裝製程技術:子計劃-電子構裝基板金屬化及銲錫隆點製程技術(Ι):氧化鋁基板, 國科會研究計劃,民國八十三年.
10.許坤賜, 電鍍參數對銲錫隆點均勻性影響及可靠度性質分析, 國立成功大學碩士論文, 民國八十八年.
11.J. H. Lau, Flip Chip Technologies, McGraw-Hill, New York, 1995, Chapter 3.
12.楊省樞, "覆晶技術", 工業材料127期, 1997, pp. 90~96.
13.呂宗興, "電子構裝技術的發展歷程", 工業材料115期, 1997, pp.49~53.
14.G. A. Rinne, “Solder Bumping Methods for Flip Chip Packaging”, 1997 Electronic Components and Technology Conference, IEEE, San Jose, CA, USA, May 1997, pp. 240~247.
15.K. Seyama, H. Yamamoto, K. Satou, H. Yoshimura, H. Ota and Y. Usui, “Transcription Solder Bump Technology Using The Evaporation Method”, 1998 International Conference on Multichip Modules and High Density Packaging, Denver, Colorado, IEEE, April 1998, pp. 314~318.
16.C. L. Wong and J. How, “Low Cost Flip Chip Bumping Technologies”, 1997 IEEE/CMPT Electronic Packaging Technology Conference, Singapore, IEEE, October 1997, pp. 244~245.
17.L Li, S. Wiegele, P. Thompson and R. Lee, "Stencil Printing Process Development for Low Cost Flip Chip Interconnect", 1998 Electronic Components and Technology Conference, Seattle, Washington USA, IEEE, May 1998, pp. 421~426.
18.P. Elenius, "Flex on Cap - Solder Paste Bumping", 1997 Electronic Components and Technology Conference, San Jose, California, IEEE, May 1997, pp. 248~253.
19.E.Jung, J. Kloeser, J. Nave, G. Englmann, and L. Dietrich, "Reliability Investigations of different Bumping Processes for Flip Chip and TAB Application", 1996 IEEE/CPMT International Electronics Manufacturing Technology Symposium, Austin, TX USA, IEEE, October 1996, pp. 274~281.
20.T. D. Dudderar, Y. Degani, J. G. Spadafora, K. L. Tai and R. C. Frye, "AT&T Surface μMount Assembly: A New Technology for the Large Volume Fabrication of Cost Effective Flip-Chip MCMs", International Journal of Microcircuits and Electronic Packaging Vol. 17, No. 4, 1994, pp. 361~368.
21.H. Noro, S. Ito, M. Kuwamura and M. Mizutani, "A Study of New Flip Chip Packaging Process for Diversified Bump and Land Combination", 1998 IEMT/IMC Proceedings, Tokyo, Japan, IEEE, April 1998, pp.100~105.
22.K. K. Yu and F. Tung, "Solder Bump Fabrication by Electroplating for Flip-Chip Applications", 1993 IEEE/CHMT International Electronics Manufacturing Technology Symposium, Santa Clara, CA USA, IEEE, October 1993, pp. 277~281.
23.孔令臣, “覆晶凸塊技術”, 工業材料139期, 1998, pp. 155~161.
24.J. Vardaman, Surface Mount Technology Recent Japanese Developments, IEEE Press, New York, 1993, Part 4.
25.J. H. Lau, Chip on Board Technologies for Multichip Modules, Van Nostrand Reinhold, An International Thomson Publishing Company, New York, 1994, Chap.5.
26.D. S. Patterson, Peter Elenius, J. A. Leal, “Wafer Bumping Technologies-A Comparative Analysis of Solder Deposition Processes and Assembly Considerations”, Advances in Electronic Packaging-1997, Vol. 1, ASME, 1997, pp. 335~339.
27.R. J. Klein Wassink, “Soldering in Electronics”, Electrochemical Publications Ltd., 2nd Edition, Ch. 4, 1989, pp. 135~139.
28.Dr. T. S. Liu, W. R. Rodrigues de Miranda, and P. R. Zipperlin, "A Review of Wafer Bumping for Tape Automated Bonding", Solid State Technol, Vol.23, No.3, Mar. 1980, pp.71-76.
29.V. Hoffman, "Tungsten Titanium Diffusion Barrier Metallization", Solid State Technol.,Vol.26, No.6, June 1983, pp.119-126.
30.R. S. Nowick, "Studies of the Ti-W/Au Metallization on Aluminum", Thin Solid Films, Vol.53, No.2, 1978, pp.195-205.
31.M. Wittmer, "Interfacial Reactions Between Aluminum and Transition-Metal Nitride and Carbide Films", J. Appl. Phys., Vol.53, No.2, Feb. 1982, pp.1007-1012.
32.G. O. Mallory and J. B. Hajdu, Electroless Plating : Fundamentals and Applications, AESF, Orlando, Florida, 1990, Chap.1.
33.G. G. Gawrilov, Chemical(Electroless) Nickel-Plating, Portcullis Press Limited, Redhill, Surrey, 1979, Chap.5.
34.神戶德藏著, 莊萬發譯著, 無電解鍍金, 復漢出版社, 民國七十四年, 第一章、第三章。
35.P. Breteau, Bull. Soc. Chim., Vol.9, 1911, pp.515-518.
36.A. Brenner and G. Riddell, J. Res. Nat. Bur. Std, Vol.37, 1946, pp.31.
37.G. Salvago and P.L. Cavallotti, "Characteristics of the Chemical Reduction of Nickel Alloys with Hypophosphite", Plating, Vol.59, No.7, July 1972, pp.665-671.
38.J. E. A. M. Van Den Meerakker, "On the Mechanism of Electroless Plating. II. One Mechanism for Different Reductants", J. Appl. Electrochem., Vol.11, No.3, 1981, pp.395-400.
39.L. F. Spencer, "Electroless Nickel Plating - A Review", Metal Finishing, Vol.72, No.12, Dec. 1974, pp.58-64.
40.C. Baldwin and T. E. Such, "The Plating Rates and Physical Properties of Electroless Nickel/Phosphorus Alloy Deposits", Tran. Institute Metal Finish., Vol.46, 1968, pp.73-80.
41.Metal Handbook, “American Society for Metals”, Ohio, Vol.5, 9th Ed., 1978, pp. 219~243.
42.K. Wong, K. Chi, and A. Rangappan, "Application of Electroless Nickel Plating in the Semiconductor Microcircuit Industry", Plat. and Surf. Finish., Vol.75, No.7, July 1988, pp.70-76.
43.李傳英,多晶片模組無電鍍鎳/浸鍍焊錫隆點之製作及其性質研究,國立成功大學礦冶及材料科學研究所博士論文,民國八十四年。
44.K. L. Lin and C. J. Chen, "The Interactions Between In-Sn Solders and an Electroless Ni-P Deposit upon Heat Treatment", J. Mater. Sci. Materials in Electronics, Vol. 7, No. 6, Nov. 1996, pp. 397~401.
45.T. Oppert, E. Zakel and T. Teutsch, “A Roadmap to Low Cost Flip Chip and CSP using Electroless Ni/Au”, IEMT/IMC Proceeding, 1998, pp. 106~113.
46.R. Aschenbrenner, A. Osdreas, G. Motulla, E. Zakel and H. Reichi, “Flip Chip Attachment Using Anisotropic Conductive Adhesives and Electroless Nickel Bumps”, IEEE Transaction on Components, Packaging, And Manufacturing Technology-part C, Vol. 20, No. 2, April 1997, pp. 95~100.
47.M. A. Nicolet, “Diffusion Barriers in Thin Films”, Thin Solid Films, Vol. 52, 1978, pp. 415~443.
48.R. F. Pinizzotto , E. G.Jacobs , Y. Wu , J. A.Sees , L. A. Foster and C. Pouraghabagherr, ”The Dependence of the Activation Energy of Intermetallic Formation on the Composition of Composite Sn/Pb Solders,” IEEE/IRPS,1993,pp. 209~216.
49.Alex C. K. So and Y. C. Chan, ”Reliability Studies of Surface Mount Solder Joints--Effect of Cu-Sn Intermetallic compounds,” Proc. of the 45th. Electronic Components Conference,1995,pp. 1073~1080.
50.Alex C. K. So and Y. C. Chan, ”Aging Studies of Cu-Sn Intermetallic compounds in Annealed Surface Mount Solder Joints,” in Proc. 46th.Electron. Comp.Conf., Orlando, FL,May 1996,pp. 1164~1171.
51.P. L. Tu, Y.C. Chan, and J. K. L. Lai, ”Effect of Intermetallic Compounds on the Thermal Fatigue of Surface Mount Solder Joints,” IEEE Trans. Comp., Packaging, Manufact. Technol., Vol. 20,1997,pp. 87~93.
52.M. A. Nicolet and M. Bartur, “Diffusion Barriers in Layered Contact Structures”, J. Vac. Sci. Technol., Vol. 19, No. 3, 1981, pp. 786~793.
53.陳智禮, 間斷析鍍無電鍍鎳磷合金之性質與銲錫隆點上之應用, 國立成功大學碩士論文, 民國八十八年.
54.楊聰仁, 無電鍍鎳及其應用, 國彰出版社, 台中市, 民國76年, 第一章、第二章.
55.H. Ke-Ping and F. Jing-Li, “Acceleration Effect of Electroless Nickel Deposition by Thiourea”, International Journal of Chemical Kinetics,Vol. 28, No. 4, Apr 1996, pp. 259~264.
56.A. M. T. van der Putten and J. W. G. de Bakker, “Anisotropic Deposition of Electroless Nickel”, J. Etectrochem. Soc., Vol. 140, No. 8, August 1993, pp. 2229~2235.
57.J. W. Jang, P. G. Kim and K. N. Tu, “Crystallization of Electroless Ni-P Under Bump Metallization Induced by Solder Reaction”, Proceedings of International Symposium on Advanced Packaging Materials, Braselton Georgia, 1999, pp. 252~255.
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