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研究生:楊展懿
研究生(外文):YANG, JHAN-YI
論文名稱:使用電流平方與適應性導通時間控制之鎖相鎖頻技術降壓式轉換器與軌對軌電流感測技術之無差拍控制降壓式轉換器
論文名稱(外文):A Phase-Frequency-Locked Buck Converter with Current Square and Adaptive On-Time Controlled Techniques and A Dead-Beat-Controlled Buck Converter with Rail-to-Rail Current-Sensing Techniques
指導教授:黃育賢陳建中陳建中引用關係
指導教授(外文):YUH-SHYAN HWANGCHEN, JIANN-JONG
口試委員:宋國民郭建宏黃育賢陳建中
口試委員(外文):SUNG, GUO-MINGKUO, CHIEN-HUNGYUH-SHYAN HWANGCHEN, JIANN-JONG
口試日期:2019-07-25
學位類別:碩士
校院名稱:國立臺北科技大學
系所名稱:電子工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2019
畢業學年度:107
語文別:中文
論文頁數:94
中文關鍵詞:適應性導通時間控制鎖相鎖頻技術降壓轉換器無差拍控制
外文關鍵詞:Adaptive On-Time ControlledPhase-Frequency-LockedBuck ConverterDead-Beat-Controlled
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本論文第一部份為使用電流平方與適應性導通時間控制之鎖相鎖頻技術降壓式轉換器,電路架構為適應性導通時間控制,使用新型主動式電流感測電路與鎖相鎖頻技術技術來達到頻率鎖定優點。晶片使用台積電0.35-μm互補式金屬氧化物半導體製程來實現,此晶片切換頻率為1MHz,面積1.5mm^2 x 1.5 mm^2,操作輸入電壓為3.3V,可輸出電壓範圍為1.6V到2.4V,最高負載電流為400mA,當負載電流由輕載40mA轉成重載400mA與重載400mA轉成輕載40mA,暫態響應為2μs、2.6μs ,並在輸出電壓2.5V時,負載電流400mA時達到最高效率86.2%。
論文第二部份提出軌對軌電流感測技術之無差拍控制降壓式轉換器,此電路架構為無差拍控制,使用軌對軌電流感測與動態斜率補償技術,減少電路複雜度進而提升整體電路效率,晶片使用台積電0.35-μm互補式金屬氧化物半導體製程來實現,此晶片切換頻率為1MHz,面積1.5 mm^2 x 1.5 mm^2,操作輸入電壓為3.3V,可輸出電壓範圍為1.4V到2.5V,最高負載電流為700mA,當負載電流由輕載50mA與重載600mA之間變化,暫態響應為1.8μs ,並在輸出電壓2.5V時,負載電流350mA時達到最高效率88.3%。

The first proposed converter of this thesis is a phase-frequency-locked buck converter with current square and adaptive on-time controlled techniques buck converter with new active current-sensing techniques. The buck converter uses adaptive on-time controlled and new active current-sensing circuit and phase-frequency-locked technique to achieve the advantage of frequency locked. The proposed buck converter has been fabricated with TSMC 0.35μm 3.3V CMOS 2P4M technology, switching frequency is 1MHz and the chip area is 1.5 mm  1.5 mm. The experimental results show that the proposed converter's output voltage rang is from 1.6V to 2.4V, the maximum output current is 400mA, the transient response is 2μs and 2.6μs, and peak power efficiency is 86.2% under 2V output voltage and 400mA load current

The second proposed converter of this thesis is a dead-beat-controlled buck converter with rail-to-rail current-sensing techniques. This buck converter uses rail-to-rail current-sensing circuit and dynamic-slope compensation technique to decrease circuit complexity, so that it can improved overall efficiency. The proposed buck converter has been fabricated with TSMC 0.35μm CMOS 2P4M technology. The switching frequency is 1MHz and the chip area is 1.5 mm  1.5 mm. The experimental results show that the proposed converter's output voltage rang is from 1.4V to 2.5V, the maximum output current is 700mA, the best transient response is 1.8μs, and peak power efficiency is 88.3% under 2V output voltage and 350mA load current.


目錄

摘要 i
ABSTRACT iii
致謝 v
目錄 vi
表目錄 ix
圖目錄 x
第一章 緒論 1
1.1相關研究發展近況 1
1.2研究動機與目的 4
1.3論文架構 5
第二章 切換式降壓轉換器原理說明 6
2.1 切換式降壓轉換器原理 6
2.1.1連續導通模式 8
2.1.2 非連續導通模式 12
2.1.3 邊界導通模式 14
2.2 切換式轉換器控制模式分析 16
2.2.1電壓模式控制 17
2.2.2電流模式控制 18
2.2.2.1峰值電流模式控制 18
2.2.2.2平均電流模式控制 19
2.2.3磁滯控制 20
2.2.4固定導通時間控制 21
2.3切換式降壓轉換器調變技術 22
2.3.1脈波寬度調變技術 22
2.3.2脈波頻率調變技術 24
2.4切換式轉換器特性與定義說明 25
2.4.1輸出電壓漣波(Output Voltage Ripple) 25
2.4.2暫態響應(Transient Response) 26
2.4.3暫態電壓(Transient Voltage) 27
2.4.4線性調節率(Line Regulation) 27
2.4.5負載調節率(Load Regulation) 28
2.4.6效率(Efficiency) 28
第三章 使用電流平方與適應性導通時間控制之鎖相鎖頻技術降壓式轉換器 30
3.1架構介紹 30
3.1.1新型主動式電流感測電路 32
3.1.2適應性導通時間控制電路 34
3.1.3電流誤差放大器 35
3.1.4運算轉導放大器 36
3.1.5相位頻率檢測電路 37
3.1.6電荷幫浦電路 38
3.1.7低通濾波器 39
3.1.8非重疊電路與驅動電路 43
3.2電路模擬 45
3.3整體電路佈局與晶片測量結果 48
3.3.1晶片佈局 48
3.3.2晶片腳位與定義 50
3.3.3量測環境 52
3.3.4量測結果 53
3.3.5規格表與相關文獻比較 59
第四章 使用軌對軌電流感測技術之無差拍控制降壓式轉換器 61
4.1架構介紹 61
4.1.1時脈產生器 63
4.1.2二階運算放大器 65
4.1.軌對軌電流感測電路 66
4.1.4動態斜率補償 68
4.1.5無差拍控制技術 69
4.1.6 TypeⅢ補償電路 74
4.2電路模擬 75
4.3整體電路佈局與晶片測量結果 76
4.3.1晶片佈局 76
4.3.2晶片腳位與定義 78
4.3.3量測環境 80
4.3.4量測結果 81
4.3.5規格表與相關文獻比較 87
第五章 結論與未來展望 89
5.1結論 89
5.2未來展望 90
參考文獻 91


參考文獻
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