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研究生:洪川傑
研究生(外文):Chuan-Jie Hong
論文名稱:二維材料場效電晶體與記憶體元件
論文名稱(外文):2D materials field-effect transistor and memory device
指導教授:鐘元良
指導教授(外文):Yuan-Liang Zhong
學位類別:碩士
校院名稱:中原大學
系所名稱:物理研究所
學門:自然科學學門
學類:物理學類
論文種類:學術論文
論文出版年:2018
畢業學年度:106
語文別:中文
論文頁數:78
中文關鍵詞:二維材料記憶體多層位元
外文關鍵詞:2D materialsMemoryMulti-level cell
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隨著現代科技進步的影響,電子產品成為人們生活中不可或缺的存在,每項產品都是由許多電子電路、處理器、邏輯元件等等組成,而這些元件的基礎為場效電晶體 (field-effect transistor) 。隨著電晶體元件的微小化,面臨物理極限的挑戰,需要新穎材料來解決,近年來二維材料為十分熱門的奈米材料之一,我們將利用二維材料做為通道材料來製作場效電晶體,本論文中會將會製作二維材料場效電晶體,並進一步量測分析及探討其電晶體元件特性及其應用。
在電子產品中,記憶體扮演著相當重要的角色,但目前記憶體的發展卻面臨了高密度容量的挑戰。在本論文中我們提出一個以二維材料場效電晶體為基底的新穎記憶體元件,藉由分子修飾在二維材料的通道上形成自組裝的分子層,這些分子能夠被不同的閘極脈衝電壓來調節,而導致有不同的通道電導以及電荷儲存狀態。利用調整不同的閘極脈衝電壓大小以及脈衝持續時間來控制影響其分子的數量,就能夠達成多重儲存態的效果。我們認為這對於新穎記憶體元件來說是相當不錯的嘗試。
With the advancement of modern science and technology, electronic products have become an indispensable existence in people''s lives. Each product consists of electronic circuits, processors, logic components, etc., and the base of these components is the field-effect transistor. The miniaturization of the transistor faces the challenge of physical limits and requires new materials to solve. In recent years, two-dimensional materials are one of the most popular nano-materials. We will use 2D materials as channel materials to make field effect transistors. In this paper, we will analyze and discuss the results after measuring electrical properties.
Memory plays a very important role in electronic products, but current memory development is facing the challenge of high density capacity. This research demonstrates the novel memory device based on two-dimensional material field effect transistor, in which self-assembled molecular layer is formed on two-dimensional material channel by molecular modification. The molecular configurations can be altered by different gate voltage pulse, leading to the different channel conductance and charge storage states. Using different gate voltage pulse and pulse duration times to control how many molecules are affected, devices can achieve multi-level storage states. We think this is a good step for the attempt in the development of novel memory device.
中文摘要 I
Abstract II
致謝 III
目錄 IV
圖目錄 VIII
表目錄 XI
第一章 諸論 1
1-1 場效電晶體發展 1
1-2 二維材料特性 4
1-3 記憶體元件發展 6
1-4 研究動機 8
第二章 文獻回顧 10
2-1 單層二硫化鉬電晶體 10
2-2 記憶體元件 12
2-2-1 電荷捕獲記憶體元件 12
2-2-2 分子記憶體 14
第三章 實驗方法 16
3-1 二維材料場效電晶體製作 16
3-1-1 單層二硫化鉬場效電晶體 16
3-1-1-1 化學氣相沉積法 17
3-1-1-2 轉置單層二硫化鉬 18
3-1-1-3 定位單層二硫化鉬 19
3-1-1-4 設計光罩圖案 20
3-1-1-5 電子束直寫微影系統 21
3-1-1-6 電子束蒸鍍系統 22
3-1-2 多層二硫化鉬場效電晶體 24
3-1-2-1 背閘極元件製作 24
3-1-2-2 原子層沉積 25
3-1-2-3 上閘極元件製作 26
3-2 分子修飾 27
3-2-1 自組裝分子 27
3-2-2 分子修飾方法 28
3-3 材料檢測分析 29
3-3-1 穿透式電子顯微鏡 (TEM) 29
3-3-2 傅立葉轉換紅外線光譜儀 (FTIR) 30
3-4 電性量測 32
3-4-1 量測儀器介紹 32
3-4-2 施加閘極脈衝電壓 33
第四章 結果與討論 34
4-1 單層二硫化鉬場效電晶體電性分析 34
4-1-1 基本電性量測 34
4-1-2 不同製程條件比較 37
4-1-3 施加不同側電極 39
4-2 記憶體元件FTIR光譜分析 42
4-2-1 分子修飾前後FTIR光譜分析 42
4-2-2 不同閘極電壓FTIR光譜分析 43
4-2-3 分子結構可逆性FTIR光譜分析 46
4-3 記憶體元件電性量測 47
4-3-1 分子修飾前後電性比較 47
4-3-2 記憶體元件特性檢測 48
4-3-3 記憶體元件空白實驗 50
4-3-4 記憶體元件多重態(MLC)特性 51
4-3-5 記憶體元件穩定性、重複性檢測 56
第五章 結論 59
5-1 單層二硫化鉬場效電晶體 59
5-2 分子修飾記憶體元件 60
5-3 未來工作 61
參考資料 62
附錄 65
[1]X. Huang, Z. Zeng, and H. Zhang, "Metal dichalcogenide nanosheets: preparation, properties and applications," Chem Soc Rev, vol. 42, no. 5, pp. 1934-46, Mar 7 2013.
[2]S. Kim et al., "High-mobility and low-power thin-film transistors based on multilayer MoS2 crystals," Nat Commun, vol. 3, p. 1011, 2012.
[3]Q. H. Wang, K. Kalantar-Zadeh, A. Kis, J. N. Coleman, and M. S. Strano, "Electronics and optoelectronics of two-dimensional transition metal dichalcogenides," Nat Nanotechnol, vol. 7, no. 11, pp. 699-712, Nov 2012.
[4]K. F. Mak, C. Lee, J. Hone, J. Shan, and T. F. Heinz, "Atomically ThinMoS2: A New Direct-Gap Semiconductor," Physical Review Letters, vol. 105, no. 13, 2010.
[5]D. Xiao, G.-B. Liu, W. Feng, X. Xu, and W. Yao, "Coupled Spin and Valley Physics in Monolayers ofMoS2and Other Group-VI Dichalcogenides," Physical Review Letters, vol. 108, no. 19, 2012.
[6]S. M. S. D. Kahug, "A floating gate and its application to memory devices," Bell syst. Tech, 1967.
[7]V. K. Sangwan et al., "Gate-tunable memristive phenomena mediated by grain boundaries in single-layer MoS2," Nat Nanotechnol, vol. 10, no. 5, pp. 403-6, May 2015.
[8]H. N. M. Chen, S. Wi, G. Priessnitz, I. M. Gunawan, X. Liang, "Multibit data storage states formed in plasma-treated MoS2 transistors," ACS Nano, 2014.
[9]B. Radisavljevic, A. Radenovic, J. Brivio, V. Giacometti, and A. Kis, "Single-layer MoS2 transistors," Nat Nanotechnol, vol. 6, no. 3, pp. 147-50, Mar 2011.
[10]W. W. Enze Zhang, Cheng Zhang, Yibo Jin, Guodong Zhu, Qingqing Sun, David Wei Zhang, and a. F. X. Peng Zhou, "Tunable Charge-Trap Memory Based on Few-Layer MoS2," ACS Nano, vol. 9, pp. 612-619, 2015.
[11]H.-W. You and W.-J. Cho, "Charge trapping properties of the HfO2 layer with various thicknesses for charge trap flash memory applications," Applied Physics Letters, vol. 96, no. 9, 2010.
[12]M. Min, S. Seo, S. M. Lee, and H. Lee, "Voltage-controlled nonvolatile molecular memory of an azobenzene monolayer through solution-processed reduced graphene oxide contacts," Adv Mater, vol. 25, no. 48, pp. 7045-50, Dec 23 2013.
[13]Y. Yu, C. Li, Y. Liu, L. Su, Y. Zhang, and L. Cao, "Controlled scalable synthesis of uniform, high-quality monolayer and few-layer MoS2 films," Sci Rep, vol. 3, p. 1866, 2013.
[14]Y. Z. Yu Zhang, Qingqing Ji, Jing Ju, Hongtao Yuan, Jianping Shi, Teng Gao, Donglin Ma, Mengxi Liu, Yubin Chen, Xiuju Song, Harold Y. Hwang, Yi Cui, Zhongfan Liu, "Controlled Growth of High-Quality monolayer wse2 layers on sapphire and imaging its grain boundary," ACS Nano, vol. 7, pp. 8963-8971, 2013.
[15]L. Y. H. Wang, Y.-H. Lee, W. Fang, A. Hsu, P. Herring, M. Chin, M. Dubey, L.-J. Li, J. Kong, T. Palacios, "Large-scale 2D Electronics based on Single-layer MoS2 Grown by Chemical Vapor Deposition," IEDM Tech, pp. 4.6.1-4.6.4, 2012.
[16]J. R. H. Creighton, P., "In Chemical Vapor Deposition (Surface Engineering Series Vol. 2," ASM International: Materials Park, p. 1, 2001.
[17]L. P. Feng, J. Su, D. P. Li, and Z. T. Liu, "Tuning the electronic properties of Ti-MoS2 contacts through introducing vacancies in monolayer MoS2," Phys Chem Chem Phys, vol. 17, no. 10, pp. 6700-4, Mar 14 2015.
[18]B.-W. W. K.-S. Li, L.-J. Li, M.-Y. Li, C.-C., Kevin, Cheng, C.-L. Hsu, C.-H. Lin, Y.-J. Chen, C.-C. Chen, C.-T. Wu, M.-C. Chen, J.-M. Shieh, W.-K. Yeh, Y.-L. Chueh, F.-L. Yang, C. Hu, "MOS2 V-shape MOSFET with 10 nm Channel Length and Poly-Si Source/Drain Serving as Seed for Full Wafer CVD MOS2 Availability," IEEE VLSI., 2016.
[19]A. Ulman, "Formation and Structure of Self-Assembled Monolayers," Chem. Rev., pp. 1533-1554, 1996.
[20]G. He et al., "Conduction Mechanisms in CVD-Grown Monolayer MoS2 Transistors: From Variable-Range Hopping to Velocity Saturation," Nano Lett, vol. 15, no. 8, pp. 5052-8, Aug 12 2015.
[21]Y. Guo et al., "Charge trapping at the MoS2-SiO2 interface and its effects on the characteristics of MoS2 metal-oxide-semiconductor field effect transistors," Applied Physics Letters, vol. 106, no. 10, 2015.
[22]P.-Z. Shao et al., "Enhancement of carrier mobility in MoS2 field effect transistors by a SiO2 protective layer," Applied Physics Letters, vol. 108, no. 20, 2016.
[23]M. S. H. Liu, S. Najmaei, A. T. Neal, Y. Du, P. M. Ajayan, J. Lou and P. D. Ye, "Dual-Gate MOSFETs on Monolayer CVD MoS2 Films," IEEE, 2013.
[24]C. Chen et al., "Growth of large-area atomically thin MoS_2 film via ambient pressure chemical vapor deposition," Photonics Research, vol. 3, no. 4, 2015.
[25]M. Eginligil et al., "Dichroic spin-valley photocurrent in monolayer molybdenum disulphide," Nat Commun, vol. 6, p. 7636, Jul 2 2015.
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