臺灣博碩士論文加值系統

本研究利用電漿輔助氣相化學設備濺鍍設備沉積閘極層(Mo)、介電層(ZrO2) 及通道層In2O3 : ZnO (IZO) 薄膜，再以黃光製程(Photolithography) 曝光顯影電晶體的光罩圖案與蒸鍍上電極(Ag)，最後以掀離製程(Lift-Off) 完成透明導電薄膜電晶體。以不同薄膜濺鍍參數對於IZO 薄膜的結晶性、結構、成分、光電特性和粗糙度等的改變，進而探討對於薄膜電晶體電性之影響。另藉由改變薄膜電晶體的通道大小來觀察其特性的變化。
實驗結果顯示，IZO薄膜經過不同的退火溫度(150°C、250°C350°C) 及不同的氬氣流量(50、100、150和200 SCCM) 時，XRD繞射分析均為非晶結構，且穿透率高達80 % 左右及較低表面粗糙度1~2 nm(Rms)。當退火溫度為350°C和氬氣流量為50 SCCM時，電阻率最低可達5.47×10-3Ω•cm；黃光製程部分，若光罩尺寸越小光阻越薄則顯影時間越短。最佳的曝光時間約8~10秒、軟烤溫度100°C。最後利用高介電常數材料ZrO2當作介電層製作薄膜電晶體，相較於傳統介電層SiO2需要施加較大的閘極電壓才能達到相當電晶體電流，ZrO2 則具有較小的施加偏壓就有放大電流特性的優勢。另外，也藉由電容的製作與分析，IV/CV量測得到電晶體介電層厚度與漏電之間的關係，探討製程成敗的相關特性。

The IZO films are processed at different annealing temperatures (350°C, 400°C, 500°C, and 600°C) under different argon gas flow (50, 100, 150, 200 SCCM).The physical characteristics of IZO films including crystal structures, photoelectric properties and morphology were obtained by using X-Ray diffraction (XRD), uv-visible spectroscopy, Hall effect measurement and atomic force microscopy (AFM).The XRD shows that the amorphous phase, the transmittance higher than 80 % and the surface roughness about 1~2 nm (Rms) are abtained. The best resistivity (annealed at 350°Cand argon gas flow is 50 SCCM) of IZO film is 5.47×10-3Ω•cm. From the photo-lithography, results show the thicker photoresist thickness needs to have longer development times. The optimum condition is 8~10 second to exposure and 100°C for soft baking.
The thin film transistors (TFTs) have been fabricated in this work by using sputtering molybdenum (Mo) as the gate layer, IZO as the channel layer and high-k zirconium dioxide (ZrO2) as the gate insulator. Different sizes of W/L for TFTs have been designed and processed by photo-lithography. Source and drain electrodes are formed by Lift-Off method after thermal evaporation of the silver (Ag). Finally, using ZrO2 as a gate insulator of TFTs with high dielectric constant, a lower operation voltage compares to traditionally SiO2 gate dielectric for the Id current. In addition, the relationship between gate insulator thickness and leakage current of both I-V and C-V curves are measured by Al/ZrO2/IZO (MIS) structures.

明志科技大學碩士學位論文指導教授推薦書………………………………. i
明志科技大學碩士學位論文口試委員審定書……………………………… ii
誌謝……………………………………………………………………………iii
中文摘要………………………………………………………………………iv
Abstract………………………………………………………………………. v
目錄……………………………………………………………………………vi
表目錄………………………………………..……………………………….vii
圖目錄.. ……………………………………………………………………...viii
第一章 序 論 1
1.1 透明導電薄膜簡介 1
1.2 薄膜電晶體簡介 1
1.2.1 非晶矽薄膜電晶體 2
1.2.2 低溫多晶矽薄膜電晶體 2
1.2.3 氧化物薄膜電晶體 3
1.2 研究動機 4
第二章 文獻回顧 6
2.1金屬氧化物半導體薄膜 6
2.2 氧化銦鋅透明導電薄膜 7
2.2.1 氧化銦鋅晶體結構 8
2.2.2 氧化銦鋅薄膜光學特性 8
2.2.3 氧化銦鋅薄膜導電性 12
2.3 氧化銦鋅薄膜電晶體 14
2.3.1 氧化銦鋅薄膜電晶體元件結構 15
2.3.2 氧化銦鋅薄膜電晶體電性分析 17
2.3.3 氧化銦鋅薄膜電晶體之應用 19
第三章 氧化銦鋅透明導電薄膜電晶體之製備 21
3.1 薄膜電晶體製程簡介 21
3.2 濺鍍製程 21
3.2.1 試片前處理 24
3.2.2 閘極層的製作 25
3.2.3 介電層的製作 25
3.2.4 通道層的製作 25
3.3 快速熱退火處理 26
3.4 黃光製程 28
3.4.1 光阻的選用 29
3.4.2 黃光製程流程 31
3.5 蒸鍍製程 34
3.6 Lift off 製程 35
3.7 特性分析 36
3.7.1 表面輪廓儀 37
3.7.2 四點探針 38
3.7.3 霍爾量測 39
3.7.4 紫外光可見光分光光譜儀 40
3.7.5 X光繞射儀 42
3.7.6 原子力顯微鏡 44
3.7.7 電壓/電流半導體量測儀 48
3.7.8 電容分析理論 49
第四章 氧化銦鋅透明導電薄膜特性分析 52
4.1霍爾電性分析 52
4.1.1 氧化銦鋅薄膜電阻率 52
4.1.2 氧化銦鋅薄膜薄膜載子濃度 55
4.1.3 氧化銦鋅薄膜薄膜載子遷移率 57
4.2 UV-vis 光學分析 60
4.2.1 氧化銦鋅薄膜 UV-vis穿透圖譜 60
4.2.2 氧化銦鋅薄膜能隙量測 63
4.3 X光繞射分析 65
4.3.1 氧化銦鋅薄膜 XRD繞射圖譜 65
4.4 原子力顯微鏡分析 68
4.5 黃光製程結果與分析 73
第五章 氧化銦鋅透明導電薄膜電晶體元件特性分析 77
5.1 IV及CV特性分析 77
5.1.1 氧化銦鋅薄膜電晶體特性分析 77
5.1.2 氧化銦鋅薄膜電晶體漏電流之探討 78
5.2 以MIS結構的電容對漏電流之探討 82
第六章 結論 86
第七章 未來規劃 87
參考文獻 88

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