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Due to the increasing of the complexity in design package of modern chip, the capacity of signals and the signal transmission rate is increasing, the interconnection path is shorter, and the substrate layout density is increasing, etc. As a result, the flip chip package has been developed. The flip chip package product consists of die, solder bump, underfill, substrate and solder ball, and each element has its characteristic properties of thermal expansion and Young's modulus. Therefore, during the temperature changes, each substrate element will be suffered internal mechanical interaction and thermal expansion these factors will result in warpage of package. Warpage related issues will make miss-alignment between solder bump and under fill cracks problem. This thesis is focused to study the effects of substrate warpage that caused by different substrate core material, substrate core thickness and adhesive material between bumps and substrate. In approach, numerical simulation has being used to achieve a prototype Flip-Chip package, then a series of warpage measurement by Shadow moire' has been conducted to study the effects of warpage due to core structures and under fill materials. As a result, an optimized Flip-Chip substrate design was achieved. It shows that the core substrate thickness is the main factor of the warpage of thin Flip-Chip packages, and substrate with lower CTE performed better adhesion property between solder ball and substrate.
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