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研究生:龍煥其
研究生(外文):Huan-Chi Lung
論文名稱:以濺鍍法在玻璃基板上研製下閘極氧化鋅薄膜電晶體之特性研究
論文名稱(外文):Fabrication and Characterization of ZnO Bottom-Gate Thin Film Transistor on Glass Substrate by Sputtering
指導教授:李明逵
學位類別:碩士
校院名稱:中原大學
系所名稱:電子工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2018
畢業學年度:106
語文別:英文
論文頁數:93
中文關鍵詞:濺鍍法氧化鋅玻璃基板薄膜電晶體
外文關鍵詞:Sputtered methodZnO thin filmglass substratethin film transistor
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透明、高電子遷移率薄膜電晶體是先進顯示器發展之關鍵,因其透明則亮度高,可以低功率操作,因電子遷移率高反應速度快,可供高解析度顯示器使用,近年來迅速發展之金屬氧化物如氧化鋅(ZnO)可滿足這些要求。
在本研究中,主要探討下閘極氧化鋅薄膜電晶體,利用射頻濺鍍法製備氧化鋅薄膜,並以使用原子層沉積系統(ALD)在ITO基板上生長之氧化鋁(Al2O3)薄膜做為氧化層。在本研究中濺鍍氧化鋅薄膜經空氣退火後,以X-ray繞射儀分析所沉積之氧化鋅薄膜晶格展現(002)從優取向,以原子力顯微鏡分析氧化鋅薄膜粗糙度,並以霍爾量測分析載子濃度與電子遷移率。
在金屬-氧化層-半導體結構中發現,退火在空氣中有最好的電容特性表現。在氧化鋅薄膜電晶體元件特性研究發現,其中通道寬度300 μm電子遷移率達到1.01 cm2/V-s,電流開關比達到1.68 × 107且次臨界擺幅達到350 mV/decade。
其中,原子力沉積系統成長的氧化鋁可藉由自我清潔的能力使的氧化層與半導體界面得到更佳的改善,且氧化鋁擁有寬能隙的優點可以使漏電流維持在10-12 A。
Transparent and high electron mobility thin film transistor (TFT) is the key technology for modern displays. The transparency can enhance the brightness of display at lower operated power. The high electron mobility can enhance the switching speed and resolution. Metal oxides, for example zinc oxide (ZnO) can meet those requirements.
In our study, the ZnO thin film is deposited by sputtering. The ALD-Al2O3 as gate dielectric is deposited on ITO/glass substrate by atomic layer deposition (ALD). Moreover, annealing of ZnO thin film in air shows the greater carrier concentration and mobility for fabrication of bottom-gate TFT. XRD spectrum of sputtered ZnO shows (002) preferred orientation with a c-axis perpendicular to the glass substrate. AFM morphology of sputtered ZnO shows a good surface roughness. And carrier concentration and mobility is measured by Van der Pauw Hall measurement system.
In metal-oxide-semiconductor structure, annealing in air obtains good characteristics of capacitor-voltage. In characteristics of ZnO bottom-gate thin film transistors, the mobility can reach 1.01 cm2/V-s, on-off ratio is 1.68 × 107, and subthreshold swing is 350 mV/decade. In addition, ALD-Al2O3 has many advantages, such as high bandgap and self-cleaning which could improve interface state between oxide and semiconductor. Thus, the leakage current is kept at 10-12 A.
CONTENTS
摘要 I
Abstract II
CONTENTS III
LIST of FIGURES V
LIST of TABLES VIII
Chapter 1 1
Introduction 1
1-1 Characterization of bulk ZnO 1
1-2 Growth methods for ZnO thin films 2
1-3 Native defects of ZnO thin film 2
1-4 Comparison of thin film transistors 3
1-5 Structures of thin film transistors 4
1-6 Development of displays and thin film transistors 8
1-7 Motivation of ZnO bottom-gate thin film transistor 10
Chapter 2 19
Experiments 19
2-1 Fabrication process for Al contact resistance on ZnO/Al2O3/glass substrate by transmission line method (TLM) 19
2-2 Fabrication process for ZnO MOS capacitors with Al2O3 as dielectric 21
2-3 Fabrication process for ZnO bottom-gate thin film transistor with Al2O3 as gate dielectric 23
2-4 Deposition and measurement systems 26
Chapter 3 44
Results and Discussion 44
3-1 Dependence of carrier concentrations and electron mobilities of annealed ZnO/glass in N2, N2O, O2 and air as a function of RF sputtering power 44
3-2 Electrical characteristics of Al ohmic contacts on sputtered ZnO (40 nm)/glass substrates annealed in air at 300 ℃ for 1 hr 46
3-3 C-V measurement of Al/sputtered ZnO (40 nm)/ALD-Al2O3 (50 nm)/ITO/glass MOS capacitors 48
3-4 Electrical characteristics of sputtered ZnO bottom-gate thin film transistors 49
Chapter 4 74
Conclusions 74
References 75


LIST of FIGURES
Figure 1-1 The atomic structure of wurtzite ZnO 12
Figure 1-2 The total pixel area 12
Figure 1-3 Structures of thin film transistors 14
Figure 1-4 Operations of bottom-gate thin film transistor and ID-VG characteristics (a) Accumulation (b) Depletion (c) Inversion 15
Figure 1-5 Operations of bottom-gate thin film transistor and ID-VD characteristics (a) Low drain voltage (b) Pinch-off (c) Beyond saturation 16
Figure 1-6 Growth mechanism of ALD-Al2O3 17
Figure 1-7 Developments of displays 17
Figure 1-8 Dependence of mobilities and pixels 18
Figure 1-9 Developments of thin film transistors 18
Figure 2-1 Fabrication process for Al contact resistance on ZnO/Al2O3/glass substrate by transmission line method (TLM) 32
Figure 2-2 Fabrication process for ZnO MOS capacitors with Al2O3 as dielectric 35
Figure 2-3 The C-V electrical measurement of ZnO MOS capacitors 35
Figure 2-4 Fabrication process for ZnO bottom-gate thin film transistor 41
Figure 2-5 (a) RF sputtering system (TRUMPF, PFG-300RF), (b) atomic layer deposition (ALD) system (CNT, Fiji-202), and (c) e-beam evaporation system (AST, Peva-600EI) 42
Figure 2-6 (a) show atomic force microscope (AFM) measurement system (Veeco, D-5000), (b) field-emission scanning electron microscope (FE-SEM) measurement system (JEOL, JSM-6500F), and (c) x-ray diffraction (XRD) measurement system (Bruker, D8 ADVANCE ECO) 42
Figure 2-7 (a) Van der Pauw Hall measurement system (Ecopia, HMS-5000), (b) capacitance-voltage measurement system (Agilent, E4980A), and (c) current-Voltage measurement system (Agilent, HP-4145B) 43
Figure 3-1 (a) carrier concentrations and (b) electron mobilities of annealed ZnO/glass in N2, N2O, O2, and air as a function of RF sputtering power 58
Figure 3-2 Van der Pauw Hall mobility, Electron mobilities of ZnO/glass as a function of RF sputtering power and annealed in N2, N2O, O2 and air 58
Figure 3-3 (a) XRD spectrum of sputtered ZnO annealed in air at 300 ℃ for 1hr 59
Figure 3-3 (b) FE-SEM morphology of sputtered ZnOannealed in air at 300 ℃ for 1hr 59
Figure 3-3 (c) AFM morphology of sputtered ZnO annealed in air at 300 ℃ for 1hr 60
Figure 3-4 shows I-V characteristics of Al ohmic electrodes annealed in the range of 250 to 400 °C at a step of 25 °C for 10 min in N2 on sputtered ZnO (40 nm)/glass substrates annealed in air at 300 ℃ for 1 hr 60
Figure 3-5 (a) Contact resistance (Rc) of Al electrode on sputtered ZnO thin film measure by TLM 61
Figure 3-5 (b) Contact pads and distances 61
Figure 3-6 Annealing of sputtered ZnO (40 nm)/ALD-Al2O3 (50 nm)/ITO/glass MOS capacitors in (a) N2, (b) N2O, (c) O2, and (d) air at 300 ℃ for 1 hr 63
Figure 3-7 (a) ID-VG characteristics and (b) log(ID)-VG characteristics with ALD-Al2O3 (20 nm) gate insulator and 300 μm channel width 64
Figure 3-8 ID-VD characteristics with 300 μm channel width 65
Figure 3-9 Current crowding effect 65
Figure 3-10 (a) Activation energy of O2 molecules and (b) absorption of O2 molecules at the back surface of ZnO channel layer 66
Figure 3-11 C-V characteristics 67
Figure 3-12 (a) FE-SEM morphology of ITO gate and (b) C-V measurement of bottom-gate ZnO TFT 65 67
Figure 3-13 leakage current of gate dielectric 68
Figure 3-14 Log(ID)-VG characteristics with ALD-Al2O3 (20 nm) gate insulator and 250 μm channel width 69
Figure 3-15 ID-VD characteristics with 250 μm channel width 69
Figure 3-16 Log(ID)-VG characteristics with ALD-Al2O3 (20 nm) gate insulator and 200 μm channel width 70
Figure 3-17 ID-VD characteristics with 200 μm channel width 70
Figure 3-18 Log(ID)-VG characteristics with ALD-Al2O3 (20 nm) gate insulator and 150 μm channel width 71
Figure 3-19 ID-VD characteristics with 150 μm channel width 71
Figure 3-20 Log(ID)-VG characteristics with ALD-Al2O3 (20 nm) gate insulator and 100 μm channel width 72
Figure 3-21 ID-VD characteristics with 100 μm channel width 72
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