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研究生:邱茂成
研究生(外文):Mao-Cheng Chiu
論文名稱:使用0.18μm互補式金氧半製程設計之主動式終端匹配10-Gb/s雷射二極體驅動器
論文名稱(外文):A 10-Gb/s Laser Diode Driver with Active Back-Termination in 0.18um CMOS Technology
指導教授:蔡嘉明
指導教授(外文):Chia-Ming Tsai
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電子工程系所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2007
畢業學年度:96
語文別:中文
論文頁數:58
中文關鍵詞:雷射二極體驅動器主動式終端匹配10-Gb/s互補式金氧半
外文關鍵詞:Laser driverActive back-termination10-Gb/sCMOS
相關次數:
  • 被引用被引用:1
  • 點閱點閱:433
  • 評分評分:
  • 下載下載:51
  • 收藏至我的研究室書目清單書目收藏:0
由於雷射二極體本身為一非線性元件,因此雷射二極體驅動器為了能夠驅動低成本的10-Gb/s雷射二極體,必須在輸出端做終端匹配(Back-Termination)以吸收由不理想負載反射回來的反射信號。實現終端匹配最簡單的方法為在驅動器輸出端接上一個匹配電阻,但所帶來的負載效應也使得這樣的做法非常沒有功率效益。為了克服功率消耗的問題,近幾年已有許多實現在昂貴的砷化鎵與矽鍺製程上的主動式終端匹配架構被發表出來。在此論文中,我們新提出一個主動式終端匹配架構以作為低成本且容易實現的一個解決方法。此架構最主要由一個二極體連接形式的電晶體和一個與輸出調變電流成比例的動態偏壓電流源組成。除此之外,我們使用堆疊架構並且加入恆定偏壓電路來降低溫度製程變異的影響。電路中同時採用了並聯尖峰(Shunt Peaking)與源極電容衰減(Capacitive Degeneration)來增加操作頻寬。我們並將此適用於低電壓先進互補式金氧半製程的架構實現在一個供應電壓為1.8V之10-Gb/s 雷射二極體驅動器上。此雷射二極體驅動器採用了TSMC 0.18um CMOS製程,同時輸出調變電流範圍設計在20mA到60mA。晶片量測的結果為上升時間與下降時間小於38ps,且信號抖動量(Jitter)峰對峰值為12.3ps。輸出端反射損失在10GHz之前可以維持7dB以上。電路整體功率消耗在輸出調變電流60mA狀況下只需0.24W。電路佈局面積則是760μm*610μm。
中文摘要.................................i
英文摘要................................ii
誌謝....................................iv
目錄.....................................v
圖目錄.................................vii
表目錄..................................ix
第一章 緒論...............................................1
1-1 動機.............................................1
1-2 光纖通訊系統介紹.................................2
1-3 論文組織.........................................3

第二章 高速光通訊傳送機之簡介.............................5
2-1 雷射二極體與操作特性.............................5
2-2 雷射二極體驅動器簡介.............................7
2-3 輸出端耦合介面的探討.............................7
2-4 設計參數規範和專有名詞的介紹.....................9
2-3-1 信號抖動與眼圖遮罩.........................9
2-3-2 高頻網路參數矩陣與轉換....................10

第三章 具主動式終端匹配之10-Gb/s雷射二極體驅動器設計....14
3-1 引言............................................14
3-2 高速電路之終端匹配..............................15
3-3 主動式終端匹配之實現與設計考量..................16
3-3-1 現有架構之缺點與討論.......................16
3-3-2 新提出適用於低電壓CMOS製程之主動匹配架構..20
3-4 電路架構與設計流程..............................21
3-4-1 輸出級與主動式終端匹配電路.................22
3-4-2 直流偏壓電路...............................24
3-4-3 高速電路頻寬擴增技巧.......................27
3-4-4 前置放大器電路的設計.......................32
3-5 電路佈局........................................33
3-5-1 電感的實現.................................33
3-5-2 佈局考量...................................35
3-6 模擬結果與分析..................................37

第四章 實驗結果..........................................42
4-1 量測環境介紹....................................42
4-2 晶片量測........................................43
4-2-1 電訊號量測.................................43
4-2-2 反射損失量測...............................46
4-2-3 光訊號量測.................................49
4-3 實驗結果摘要與比較..............................51
4-4 晶片照像圖......................................52
4-5 結論............................................52

第五章 討論與未來展望....................................54
參考文獻..................................................55
附錄一....................................................57
簡歷......................................................58
[1] M. Mokhtari, T. Swahn, R. H. Walden, W. E. Stanchina, M. Kardos, T. Juhola, G. Schuppener, H. Tenhunen, and T. Lewin, “InP-HBT chip-set for 40Gb/s fiber optical communication systems operational at 3V,” IEEE J. Solid-State Circuits, vol. 32, pp. 1371-1383, Sep. 1997.
[2] M. Lang, Z. Wang, Z. Lao, M. Schlechtweg, A. Thiede, M. Rieger-Motzer, M. Sedler, W. Bronner, G. Kaufel, K. Kohler, A.Hulsmann, and B. Raynor, “20-40Gb/s 0.2 μ m GaAs HEMT chip set for optical data receiver,” IEEE J. Solid-State Circuits, vol. 32, pp. 1384-1393, Sep. 1997.
[3] Gerd Keiser, “Optical Fiber communications”, McGraw- Hill, 2002.
[4] John Gowar, “Optical Communication Systems”, Prentice Hall, 1993.
[5] Behzad Razavi, “Design of Integrated Circuits for Optical Communications”, McGraw- Hill, 2003.
[6] S.O. Kasap, “Optoelectronics and Photonics: Principles and Pratices”, Prentice Hall, 2001.
[7] “Interfacing Maxim Laser Drivers with Laser Diodes”, Application Note of MAXIM, 2001.
[8] “A Introduction to Jitter in Communications Systems”, Application Note of MAXIM, 2003.
[9] “Single-Ended and Differential S-Parameters”, Application Note of MAXIM, 2001.
[10] Devendra K. Misra, “Radio-Frequency and Microwave Communication Circuits”, John Wiley & Sons, 2001.
[11] H.-M. Rein et al., “A Versatile Si-Bipolar Driver Circuit with High Output Voltage Swing for External and Direct Laser Modulation in 10Gb/s Optical-Fiber Links,” IEEE J. Solid-State Circuits, vol. 29, pp. 1014-1021, Sept., 1994.
[12] H. Ransijn et al., “A 10-Gb/s Laser/Modulator Driver IC with a Dual-Mode Actively Matched Output Buffer,” IEEE J. Solid-State Circuits, vol. 36, pp. 1314-1320, Sept., 2001.
[13] Seán Morley, “A 3V 10.7Gb/s Differential Laser Diode Driver with Active Back-Termination Output Stage”, In ISSCC Dig. Tech. papers, pages 220-221, Feb. 2005.
[14] E. Ayranci et al., “45% Power Saving in a 0.25μm BiCMOS 10Gb/s 50Ω-Terminated Packaged Active-Load Laser Driver”, In ISSCC Dig. Tech. papers, pages 552-553, Feb. 2007.
[15] C.T. Armijo, R.G. Meyer, “A New Wide-Band Darlington Amplifier,” IEEE J. Solid-State Circuits, vol. 24, pp. 1105-1109, Aug. 1989.
[16] Nicolson, S. and Khoman Phang, “Improvements In Biasing and Compensation of CMOS OPAMPS”, in Proc. IEEE ISCAS 2004, pp.665-668
[17] T. H. Lee, “The Design of CMOS Radio-Frequency Integrated Circuits,” Cambridge University Press, New York, NY, 1998.
[18] S. Galal, B. Razavi, “40Gb/s Amplifier and ESD Protection Circuit in 0.18μm CMOS Technology”, In ISSCC Dig. Tech. papers, pages 480-481, Feb. 2004.
[19] S.Galal, B. Razavi, “10Gb/s Limiting Amplifier and Laser/Modulator Driver in 0.18μm CMOS Technology”, In ISSCC Dig. Tech. papers, pages 188-189, Feb. 2003.
[20] Jaeha Kim et al., “Circuit Techniques for a 40Gb/s Transmitter in 0.13μm CMOS”, In ISSCC Dig. Tech. papers, pages 150-151, Feb. 2005.
[21] N. M. Nguyen and R. G. Meyer, “Si IC-compatible inductors and LC passive filters,” IEEE J. Solid-State Circuits, vol. 25, pp. 1028-1031, Aug. 1990.
[22] ADN2525, 10.7 Gbps Active Back-Termination, Differential Laser Diode Driver, Data Sheet, Analog Devices Inc., 2005.
[23] E. Sackinger, Y. Ota, T. J. Gabara, W. C. Fischer, “A 15-mW, 155-Mb/s CMOS Burst-Mode Laser Driver with Automatic Power Control and End of Life Detection,” IEEE J. Solid-State Circuits, vol. 35, no. 2, Feb 2000.
[24] J. Bauwelinck, W. Chen, D. Verhulst, Y. Martens, P. Ossieur, X.-Z. Qiu, J. Vandewege, “A High-Resolution Burst-Mode Laser Transmitter With Fast and Accurate Level Monitoring for 1.25Gb/s Upstream GPONs”, IEEE J. Solid-State Circuits, vol. 40, no. 6, JUN. 2005.
[25] X.-Z. Qiu, P. Ossieur, J. Bauwelinck, Y. Yi, D. Verhulst, J. Vandewege, B. D. Vos, P. Solina, “Development of GPON Upstream Physical-Media-Depedent Prototypes,” IEEE J. LIGHTWAVE TECHNOLOGY, vol. 22, no. 11, Nov. 2004.
[26] Day-Uei Li, Chia-Ming Tsai, “A 10Gb/s Burst-Mode/Continuous-Mode Laser Driver with Current-Mode Extinction-Ratio Compensation Circuit”, In ISSCC Dig. Tech. papers, pages 242-243, Feb. 2006.
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