臺灣博碩士論文加值系統

本論文實現一個具能量採集供電的微型無線心電訊號監控系統，此整合系統由數個子系統所組成，包含類比前端電路系統(由儀表放大器、濾波器和類比數位轉換器所組成)，以及生物數位訊號處理(DSP)和能源採集穩壓電路系統。此整合系統的生理檢測裝置以微小化和可攜式為訴求，搭配能源採集供電的技術以提升電池使用壽命。
在本研究中，類比前端電路特別強化低雜訊、低功率與生物訊號電路設計之需求。生醫數位訊號處理技術提供雜訊抑制與急性的心臟疾病辨識(例如心肌梗塞)功能，以最低功率消耗達到病症判斷。為了讓可攜式感測裝置的使用時間延長，我們實現了一個多輸入能量採集之可適性穩壓器設計，以太陽能與高頻無線射頻辨識(HF RFID)作為輸入能量來源，作為裝置的替代電源。此可適性穩壓器提供了調節輸出電壓1V與最大輸出功率170μW，以及最高轉換效率57％。最後將所有子系統與RF模組進行整合，以實現即時的無線心電訊號監控功能。

This thesis presents a miniature wireless ECG monitoring system with energy harvesting. This integrated system is composed of several sub-systems , including analog front-end circuits (instrumentation amplifiers, filters, and an analog-to-digital converter), biomedical digital signal processing (DSP) and an energy harvesting regulator. The physiological detection devices of the proposed integrated system meet the demands of small and portable, and improve battery life by power supply with energy harvesting techniques.
In this research, the analog front-end circuit is particularly strengthened for low noise, low power and bio-signal circuit designs. Biological digital signal processing provides noise reduction and identification of acute heart diseases (such as myocardial infarction), it reaches the illness determination by the lowest power consumption. To make the portable measurement device to extend the use of time, we implemented an adaptive regulator with multi-input energy harvesting, we used solar and high-frequency radio frequency identification (HF RFID) as the input energy sources, as the alternative power source. The proposed regulator provides a regulated output voltage of 1 V with the maximum output power of 170µW and the maximum efficiency of 57%. Finally, all subsystems and RF modules were integrated to achieve real-time wireless ECG signal monitoring.

致謝辭 xi
摘要 xiii
Abstract xv
目錄 xvii
圖目錄 xxi
表目錄 xxv
第一章 緒論 1
1.1 研究背景 1
1.2 研究動機與目的 2
1.3 論文系統架構 3
第二章 類比前端電路 5
2.1系統規格考量 5
2.1.1 操作於弱反轉區之電路設計 6
2.1.2 電極貼片產生之誤差電壓 7
2.2 電流回授儀表放大器電路設計 8
2.2.1 電路設計考量 8
2.2.2 改良式電流回授儀表放大器 9
2.3 可調頻寬濾波器電路設計 13
2.3.1 濾波器規格制定 13
2.3.2 低轉導值運算轉導放大器 14
2.4 誤差電壓消除機制 16
2.4.1 截波穩壓迴路(Chopper stabilization Loop, CHS) 17
2.4.2動態消除誤差電壓迴路(Dynamic Offset Cancellation, DOC) 19
2.5 量測結果 20
第三章 管線式類比數位轉換器 27
3.1 系統規格考量 27
3.2 由參考電壓端進行背景式增益錯誤校正 28
3.2.1 校正原理 28
3.2.2 校正電路的實現 29
3.3 切換電容式電荷分配背景式校正 31
3.3.1 校正原理 31
3.3.2 校正電路的實現 33
3.4 模擬結果 36
3.4.1 由參考電壓端進行背景式增益錯誤校正 36
3.4.2 切換電容式電荷分配背景式校正 37
3.4.3 效能比較 38
3.5 量測結果 39
3.5.1 量測環境設定 39
3.5.2 由參考電壓端進行背景式增益錯誤校正 40
3.5.3 切換電容式電荷分配背景式校正 41
第四章 心電訊號處理與心肌梗塞辨識系統 44
4.1 心電訊號處理的設計考量 44
4.2 心肌梗塞疾病辨識系統設計 44
4.2.1 DSP系統架構 44
4.2.2 EMG消除技術 46
4.2.3 ST segment classifier 48
4.3 實驗設計與展示結果 52
第五章 多種輸入能量採集數位控制穩壓器 57
5.1 系統應用介紹 57
5.2 系統設計考量與最佳化 58
5.2.1 電荷幫浦級數之最佳化 59
5.2.2 電容尺寸和時脈頻率設計考量 60
5.3 能量採集系統電路設計 61
5.3.1 HF RFID (High-Frequency Radio-Frequency Identification) 63
5.3.2 應用於HF RFID的匹配電路 64
5.3.3 動態電荷轉移開關 66
5.3.4 可適性控制器 67
5.3.5 超取樣ADC 69
5.3.6 啟動電路 72
5.4 量測結果 72
第六章 無線心電訊號監測系統 78
6.1 整合系統架構介紹 78
6.2 類比前端電路PCB的設計與實現 79
6.3 無線傳輸模組之整合與實現 84
6.3.1 Arduino單晶片微控制器與藍芽模組簡介 84
6.3.2 系統整合方法 85
6.4 LABVIEW即時描繪波形程式的建立 86
6.5 整合系統的環境設定與測試結果 88
第七章 結論與未來展望 90
7.1 結論 90
7.2 未來展望 90
參考文獻 91

[1]http://www.ndc.gov.tw/m1.aspx?sNo=0020067#.VRih5vmUeqh，"The status and trends of global population aging", Oct. 2013.
[2]R.F.Yazicioglu P.Merken; C.Van Hoof; "Effect of electrode offset on the CMRR of the current balancing instrumentation amplifiers," in Proceedings of IEEE 2005 PhD.Research in Microelectronics and Electronics Conference, vol.1, no., pp. 35- 38 vol.1, 25-28 July 2005.
[3]C. C. Enz and G. C. Temes, “Circuit techniques for reducing the effects of opamp imperfections: Autozeroing, correlated double sampling, and chopper stabilization,” in Proceedings of IEEE General Topics for Engineers, vol. 84, no. 11, pp. 1584–1614, Nov. 1996.
[4]R.F.Yazicioglu; P.Merken; R.Puers; C.Van Hoof,"A 60 W 60 nV/ Hz Readout Front-End for Portable Biopotential Acquisition Systems," IEEE J. Solid-State Circuits, vol.42, no.5, pp.1100-1110, May 2007.
[5]M.S.J. Steyaert and W.M.C.Sansen, , "A micropower low-noise monolithic instrumentation amplifier for medical purposes," IEEE J. Solid-State Circuits, vol.22, no.6, pp. 1163- 1168, Dec 1987.
[6]R.F.Yazicioglu; P. Merken; C.Van Hoof, "Integrated low-power 24-channel EEG front-end," Electronics Letters , vol.41, no.8, pp. 457- 458, 14 April 2005.
[7]Schaumann, Van Valkenburg, Design of Analog Filter, OXFORD, 1986.
[8]Jaime E. Kardontchik, Introduction to the design of transconductor-capacitor filters, Kluwer Academic Publishers, 1992.
[9]A. Veeravalli, E. Sánchez-Sinencio, and J. Silva-Martinez, “Transconductance Amplifier Structures With Very Small Transconductances : A Comparative Design Approach, ” IEEE J. Solid-State Circuits, vol. 37, no. 6, pp. 770-775, Jun. 2002.
[10]R.F.Yazicioglu P.Merken; C.Van Hoof; "Effect of electrode offset on the CMRR of the current balancing instrumentation amplifiers," in Proceedings of IEEE 2005 PhD.Research in Microelectronics and Electronics Conference, vol.1, no., pp. 35- 38 vol.1, 25-28 July 2005.
[11]C. C. Enz and G. C. Temes, “Circuit techniques for reducing the effects of opamp imperfections: Autozeroing, correlated double sampling, and chopper stabilization,” in Proceedings of IEEE General Topics for Engineers, vol. 84, no. 11, pp. 1584–1614, Nov. 1996.
[12]A.Bakker, K.Thiele, J.H. Huijsing , "A CMOS nested-chopper instrumentation amplifier with 100-nV offset ," IEEE J. Solid-State Circuits, vol.35, no.12, pp.1877-1883, Dec 2000.
[13]王光輝, 應用於ECG訊號擷取之自我校正超低功率帶通濾波器,中正大學電機工程學系碩士論文,2010.
[14]王政琳, 具增益錯誤校正之11位元每秒一億取樣率管線式類比數位轉換器, 2010.
[15]K. Nagaraj, T. Viswanathan, K. Singhal, and J. Vlach, “Switched-capacitor circuits with reduced sensitivity to amplifier gain,” IEEE Trans. Circuits Syst., vol. CAS-34, no. 5, pp. 571–574, May 1987.
[16]J. Li and U.-K. Moon, “A 1.8-v 67-mW 10-bit 100-MS/s pipelined ADC using time-shifted CDS technique,” IEEE J. Solid-State Circuits, vol. 39, no. 9, pp. 1468–1476, Sep. 2004.
[17]Y.-J.Kook, J. Li, B. Lee, andU.-K. Moon, “Low-power and high-speed pipelined ADC using time-aligned CDS technique,” in Proc. Custom Integr. Circuits Conf., Sep. 2007, pp. 321–324.
[18]B. Gregoire and U.-K. Moon, “An over-60 db true rail-to-rail performance using correlated level shifting and an opamp with 30 dB loop gain,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2008, pp. 540–634.
[19]Hafiz, O.A.; Xiaoyue Wang; Hurst, P.J.; Lewis, S.H., "Immediate Calibration of Operational Amplifier Gain Error in Pipelined ADCs Using Extended Correlated Double Sampling," IEEE J. Solid-State Circuits, vol.48, no.3, pp.749,759, March 2013.
[20]賴炳文, 背景式增益誤差校正10位元每秒五千萬次取樣率管線式類比數位轉換器, 2014.
[21]王碩薇, ECG訊號處理與心肌梗塞判斷系統設計, 2014.
[22]N. V. Thakor, J. G. Webster, and W. J. Tompkins, "Estimation of QRS complex power spectrum for design of a QRS filter", IEEE Trans. Biomed. Eng., pp.702-706, 1984.
[23]Rhou, M. Sawan, T. Desilets and F. Bellemare, "Real-time filtering technique to remove ECG interference from recorded esophageal EMG," Conference of the IEEE BioCAS, pp. 20-22 , 2008.
[24]D. Balasubramaniam and D. Nedumaran, "Implementation of ECG signal processing and analysis techniques in digital signal processor based system," in International Workshop on Medical Measurements and Applications, pp. 60-63, 2009.
[25]G. Jeong and K. Yu, "Morphological Classification of ST segment using Reference STs Set," Conference of the IEEE EMBS, 2007.
[26]http://webcache.googleusercontent.com/search?q=cache:c5rJcKZ7hjYJ:www.mmh.org.tw/taitam/medical_edu/www/%3FcontentID%3D644+&cd=1&hl=zh-TW&ct=clnk&lr=lang_zh-TW，實證醫學相關名詞，馬偕紀念醫院。
[27]P. Harrop and R. Das, Energy Harvesting and Storage for Electronic Devices 2011–2021. Berlin, Germany: IDTechEx Ltd., 2011..
[28]Bing Jiang, Joshua R. Smith, Matthai Philipose, Sumit Roy, Kishore Sundara-Rajan, Alexander V. Mamishev, “Energy Scavenging for Inductively Coupled Passive RFID Systems,” IEEE Trans. on instrumentation and measurement, vol. 56, no.1, pp. 118-125,Feb. 2007.
[29]F. Pan and T. Samaddar, Charge Pump Circuit Design. New York, NY, USA: McGraw-Hill, 2006.
[30]K.-H. Choi, J.-M. Park, J.-K. Kim, T.-S. Jung, and K.-D. Suh, “Floatingwell charge pump circuits for sub-2.0 V single power supply flash memories,” in VLSI Symp. Circuits Dig. Tech. Papers, Jun. 1997, pp. 61–62.
[31]J.-T. Wu and K. L. Chang, “MOS charge pumps for low-voltage operation,” IEEE J. Solid-State Circuits, vol. 33, no. 4, pp. 592–597, Apr. 1998.
[32]H. Shao, C.-Y. Tsui, and W.-H. Ki, “An inductor-less micro solar power management system design for energy harvesting applications,” in Proc. IEEE ISCAS, May 2007, pp. 1353–1356.
[33]G. Palumobo, D. Pappalardo, and M. Gaibotti, “Charge pump circuits: Power consumption optimization,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 49, no. 11, pp. 1535–1542, Nov. 2002.
[34]A. Prodic and D. Maksimovic, “Design of a digital PID regulator based on look-up tables for control of high-frequency DC-DC converters,” in Proc. IEEE Workshop Comput. Power Electron., Jun. 2002, pp. 18–22.
[35]D. M. Van de Sype, K. De Gusseme, F. M. L. L. De Belie, A. P. Van den Bossche, and J. A. Melkebeek, “Small-signal z-domain analysis of digitally controlled converters,” IEEE Trans. Power Electron., vol. 21, no. 2, pp. 470–478, Mar. 2006.
[36]Z. Lukic, N. Rahman, and A. Prodic, “Multibit Σ-Δ PWM digital controller IC for DC-DC converters operating at switching frequencies beyond 10 MHz,” IEEE Trans. Power Electron., vol. 22, no. 5, pp. 1693–1707, Sep. 2007.
[37]A. V. Peterchev and S. R. Sanders, “Quantization resolution and limit cycling in digitally controlled PWM converters, ” IEEE Trans. on Power Electronics, vol.18, no.1, pp. 301- 308, Jan. 2003.
[38]J. Xiao, A. V. Peterchev, J. Zhang; S. R. Sanders,; , “A 4-μA quiescent-current dual-mode digitally controlled buck converter IC for cellular phone applications, ” IEEE J. of Solid-State Circuits, vol.39, no.12, pp. 2342- 2348, Dec. 2004.
[39]C. Y. Leung, P.K.T. Mok, K. N. Leung, “A 1-V integrated current-mode boost converter in standard 3.3/5-V CMOS technologies, ” IEEE J.of Solid-State Circuits, vol.40, no.11, pp. 2265- 2274, Nov. 2005.
[40]N. J. Guilar, T. J. Kleeburg, A. Chen, D. R. Yankelevich, and R. Amirtharajah, “Integrated solar energy harvesting and storage,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 17, no. 5, pp. 627–637, May 2009.
[41]Y. K. Ramadass and A. P. Chandrakasan, “A Battery-Less Thermoelectric Energy Harvesting Interface Circuit With 35 mV Startup Voltage, ” IEEE J. of Solid-State Circuits, vol. 46,no. 1, pp. 333-341, Jan. 2011.
[42]H. Lhermet, C. Condemine, M. Plissonnier, R. Salot, P. Audebert, and M. Rosset, “Efficient power management circuit: From thermal energy harvesting to above-IC microbattery energy storage,” IEEE J. Solid-State Circuits, vol. 43, no. 1, pp. 246–255, Jan. 2008.
[43]R. Yuan and D. P. Arnold, “An Input-Powered Vibrational Energy Harvesting Interface Circuit With Zero Standby Power,” IEEE Trans. on Power Electronics, vol.26, no.12, pp.3524-3533, Dec. 2011
[44]W. Sanchez, C. Sodini, and J. L. Dawson, “An Energy Management IC for Bio-Implants Using Ultracapacitors for Energy Storage,” in Proc. IEEE Symposium on VLSI Circuits, pp.63-64. Jun. 2010
[45]http://www.ti.com/lit/ds/symlink/ina129.pdf，Texas Instruments INA128 /INA129 - Precision, Low Power Instrumentation Amplifiers.
[46]http://www.ti.com/lit/ds/snosbw5c/snosbw5c.pdf，Texas Instruments TL082 - Wide Bandwidth Dual JFET Input Operational Amplifier.
[47]http://www.arduino.cc/，Arduino - Homepage.