臺灣博碩士論文加值系統

目前三維堆疊結構已成為NAND 快閃記憶體發展的主要趨勢。在三維的結構中，絕緣的電荷補捉層比起導電的浮動閘極可以不需要在層與層之間另外加上絕緣層，因此氮化矽成為了三維記憶體主流的電荷補捉層。同樣的，使用高介電值的絕緣體以及使用奈米晶粒來儲存電荷也有淺力成為未來的三維堆疊補捉層材料。另外，由於3D結構需要將捕捉層沉積進入很深的溝槽，所以在沉積電荷捕捉層時需要具有很高的階梯覆蓋率，而原子層沉積（ALD）就是一個很適當的技術。因此，在本論文中，我們引入了新的高介電值的捕捉層，藉由循環ALD沉積TiO2（或TiN）/ Al2O3並在之後加上快速熱退火形成均勻的捕捉層，其被稱為ATO和ATON。
在本論文中首先討論了ATO和ATON層的材料分析。ATO和ATON在XRD分析中顯示為均勻的無結晶層。在XPS分析中，ATON的組成主要為TiO2而不是預期TiN，並且具有比ATO捕捉層更少的Ti比例，N的比例也很低，僅百分之一左右。我們製造並測量具有不同捕捉層的電容(MOSCAP)。NN3和NO3 電容在18 V 寫入1秒後可以達到約5 V的記憶窗口，而NN5和NO5則可達到約3.5 V。使用ATO層和ATON層的電容的寫入速度接近，而使用ATO層呈現更快的寫入速度但較差的電荷持久性，表示ATO層擁有較淺的陷阱。除NN3樣品外，其他樣品在室溫下的持久性都可達到商業的10年要求。
最後，我們用NN3和NN5 捕捉層製造VG TFT記憶體。記憶特性的趨勢與電容元件一致。 NN5具有較大的〜6V記憶窗口，NN3則具有約3.5 V的記憶窗口。通過ALD沉積的ATON記憶體具有巨大的記憶窗口，並且可接受的存儲特性，因此有潛力作為下一代3D NAND記憶體的捕捉層。

Three-dimensional (3D) architecture has been the main trend of NAND flash memory in industry. Due to no necessity for isolating between each layer insulated charge trapping (CT) layer is used rather than traditional floating gate. Although, commercial 3D NAND was based on SONOS memory, the SONOS like memory or NC memory should be potential for the next generation 3D NAND. Since the 3D structure has a high aspect ratio, the deposition of charge trapping layer is necessary to have high conformity. An appropriate technique is atomic layer deposition (ALD). Thus, in this thesis we introduce new CT layers which were formed by a cyclic ALD deposition of TiO2 (or TiN)/Al2O3 layers and followed by rapid thermal annealing, which is named as ATO and ATON respectably.
In this thesis material analysis of ATO and ATON layer was covered. ATO and ATON shown amorphous and no crystallization in the XRD analysis. In XPS analysis, ATON CT layer shows mostly TiO2 component rather than TiN and has less Ti, N ratio than which we expect. Then, MOSCAP with different CT layer was fabricated and measured. NN3 and NO3 MOSCAP can reach a 5 V memory window while NN5 and NO5 are about 3.5 V after programed 18 V for 1 sec. ATO layers show faster erase speed and poorer retention which indicates a shallower trap. Except NN3 sample, other samples can reach the commercial retention requirement of 10 years.
Last, we fabricated VG TFT memory with NN3 and NN5 CT layer. The trend of memory characteristic coincide with MOSCAP. NN5 has a bigger ~6 V window and NN3 has about 3.5 V. In sum, the ATON layer deposition by ALD has a huge memory window and acceptable memory characteristics may be use as next generation 3D NAND memory

Abstract (Chinese)……………………………………………………i
Abstract (English)……………………………………………………iii
Acknowledges……………………………………………………v
Contents……………………………………………………vi
List of Tables……………………………………………………viii
List of Figures……………………………………………………ix

Chapter 1 Introduction……………………………………………………………………………1
1-1 Floating Gate Flash Memory………………………………………………………1
1-2 Charge Trapping Memory…………………………………………………………………1
1-3 Nanocrystal Memory……………………………………………………………………………3
1-4 3D NAND Flash Memory………………………………………………………………………3
1-5 Motivation…………………………………………………………………………………………………5
1-6 Thesis Organization…………………………………………………………………………6

Chapter 2 Experimental Procedure………………………………………………10
2-1 Device Fabrication…………………………………………………………………………10
2-1-1 MOSCAP……………………………………………………………………………………………………10
2-1-2 VG TFT Memory…………………………………………………………………………………11
2-2 Electrical Characterization Techniques……………………13
2-2-1 Basic Device Characteristic……………………………………………13
2-2-2 Memory Performance……………………………………………………………………14

Chapter 3 Results and Discussion………………………………………………20
3-1 Introduction…………………………………………………………………………………………20
3-2 Material Analysis……………………………………………………………………………20
3-3 Memory Characteristics of MOSCAP……………………………………22
3-3-1 Band Diagram……………………………………………………………………………………22
3-3-2 Hysteresis…………………………………………………………………………………………23
3-3-3 Programming/Erase Speed and Memory Window………23
3-3-4 Retention……………………………………………………………………………………………25
3-4 Memory Characteristics of VG TFT memory…………………26
3-4-1 Device Profile………………………………………………………………………………26
3-4-2 Programming/Erase Speed and Memory Window………26

Chapter 4 Conclusions and Future Work…………………………………50
4-1 Summary and Conclusions………………………………………………………………………………………………………50
4-2 Future Work……………………………………………………………………………………………51
References…………………………………………………………………………………………………………52

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