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研究生:廖宜楨
研究生(外文):Yi-Zhen Liao
論文名稱:類比萬用二階濾波器之超大型積體電路架構設計與研究
論文名稱(外文):Study of VLSI Architecture Design for Analog Universal Biquad Filters
指導教授:李文達李文達引用關係
口試委員:李宗演陳建中黃育賢郭建宏劉遠楨
口試日期:2010-01-06
學位類別:博士
校院名稱:國立臺北科技大學
系所名稱:電腦與通訊研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2010
畢業學年度:98
語文別:英文
論文頁數:136
中文關鍵詞:類比主動元件濾波電路
外文關鍵詞:analogactive elementbiquad filter
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本論文以主動元件設計類比二階濾波電路,主要是使用差動差分電流傳輸器(Differential Difference Current Conveyor, DDCC)、運算轉導放大器(Operational Transconductance Amplifier, OTA)與第二代完全差動電流傳輸器(Second-generator Fully Differential Current Conveyor, FDCCII)設計之。此部份總共設計五個濾波電路。
首先第一個電壓式電路分別使用三個差動差分電流傳輸器,三個運算轉導放大器與二個電容,同時實現低通、高通、帶通、帶拒以及全通五種濾波功能,消耗功率為23.69mW,晶片面積為0.916mm2。第二個電壓式電路使用一個差分差動電流傳輸器,二個運算轉導放大器與二個電容,同時實現低通、高通、帶通三種濾波功能,消耗功率為83mW,晶片面積為0.822mm2。其優點都具有低靈敏度、不需匹配條件、不需任何電阻元件、低寄生效應及易調整操作頻率。
第三個電壓式電路使用二個差動差分電流傳輸器,二個電阻與二個電容,同時實現低通、高通、正型帶通、負型帶通四種濾波功能,消耗功率為229.7μW,晶片面積為0.79mm2。其優點除了具有低靈敏度、不需匹配條件外,所有的被動元件皆接地亦可減少寄生效應且整體電路架構簡單。
第四個電路僅使用五個運算轉導放大器,二個電容,可實現電壓模式、電流模式、電導模式、電阻模式的濾波功能,消耗功率為30.95mW,晶片面積為0.823mm2。此電路優點具有低靈敏度、諧振角頻率 及品質因素Q正交可調及電容接地減少寄生效應。
第五個電路使用一個第二代完全差動電流傳輸器,二個電阻與二個電容,同時實現低通、高通、帶通、帶拒四種濾波功能。此電路另一功能藉由三個輸入端一個輸出端,可實現低通、高通、帶通、帶拒以及全通五種濾波功能。優點無需任何匹配條件且被動元件均接地。
以上五種濾波電路分別使用台積電0.35微米互補式金氧半製程與0.18微米互補式金氧半製程模擬,並且使用HSPICE及MATLAB以模擬方式驗證電路之可行性與正確性,最後一些重要電路均實際下線並且實測之。


In this dissertation, active elements such as Differential Difference Current Conveyor (DDCC), Operational Transconductance Amplifier (OTA), and Fully Differential Second-generator Current Conveyor (FDCCII) are used to design five kinds of biquad filter.
First, a voltage-mode (VM) circuit is designed by using three DDCCs, three OTAs and two capacitors. It can realize low-pass, high-pass, band-pass, band-reject and all-pass filters simultaneously. The operating frequency can be up to 500 KHz with power consumption of 23.69mW. The chip area of the analog filter is 0.916mm2. For the second design, the high input impedance voltage-mode biquad filter is presented, which employs one DDCC, two OTAs and two grounded capacitors. It can realize three kinds of filter response including low-pass, high-pass and band-pass filters from the same configuration. The power consumption is 83mW and the chip area is 0.822mm2. Both of the biquad filters have the same advantages such as low sensitivity, no requirements for component matching conditions, no floating effects and any resistors, also the operating frequency can be adjusted easily.
The third filter design employs two DDCCs, two resistors and two capacitors. It can realize low-pass, high-pass, positive band-pass and negative band-pass filters simultaneously. The power dissipation is 229.7μW and the chip area is 0.79mm2. Besides having advantages of low sensitivity and no matching conditions, this design has further advantages such as having no floating effects and has simply architecture.
The fourth design used only five OTAs and two capacitors for the mixed-mode biquad filter. It can realize the voltage, current, trans-conductance, and trans-resistance mode filter responses. The advantages of the circuit are low sensitivity, the parameters and are orthogonally adjustable and the grounded capacitors can reduce the floating effects. The power dissipation is 30.95mW and the chip area is 0.823mm2.
The final design uses one FDCCII, two capacitors and two resistors for the voltage mode biquad filter. The filter with two inputs and four outputs can perform simultaneous realization of voltage-mode band-reject, high-pass, band-pass and low-pass filter signals from the four output terminals, respectively. On the other hand, it also can act as a universal voltage-mode filter with three inputs and a single output and can realize five generic voltage-mode filter signals without any inverting input voltage signal and component-matching conditions.
The H-SPICE simulations of five filters are with TSMC 0.35μm CMOS 2P4M process and TSMC 0.18μm CMOS 1P6M technology process respectively and Matlab was used to compare the theoretical results with the simulation. Finally, most of filter circuits have been implemented and measured.


摘要 I
ABSTRACT III
致謝 V
CONTENTS VII
LIST OF TABLES XI
LIST OF FIGURES XIII
Chapter 1 INTRODUCTION 1
1.1 MOTIVATION 1
1.2 DOCUMENTATION SURVEY 3
1.3 ORGANIZATION OF THIS DISSERTATION 5
Chapter 2 INTRODUCTION OF ACTIVE ELEMENT 7
2.1 MODEL OF NULLOR 7
2.2 OPERATIONAL TRANSCONDUCTIONCE AMPLIFIER (OTA) 10
2.3 DIFFERENTIAL DIFFERENCE CURRENT CONVEYOR (DDCC) 16
2.4 SECOND-GENERATION FULLY DIFFERENTIAL DIFFERENCE CURRENT CONVEYOR (FDCCII) 21
2.5 OPERATIONAL AMPLIFIER (OPA) 25
Chapter 3 NEW MULTI-FUNCTION FILTER CHIP USING DDCC AND OTA
29
3.1 Literature of The Filter 29
3.2 NEW MULTI-FUNCTION FILTER CIRCUIT 34
3.3 SIMULATION AND EXPERIMENTAL RESULTS 38
3.3.1 Simulation Results 38
3.3.2 Experimental Results 42
3.4 SUMMARY 46
Chapter 4 NEW VOLTAGE-MODE BIQUAD FILTER USING DDCC AND OTA
49
4.1 LITERATURE OF THE FILTER 50
4.2 NEW VOLTAGE-MODE BIQUAD FILTER 52
4.3 SIMULATION AND EXPERIMENTAL RESULTS 56
4.3.1 Simulation Results 56
4.3.2 Experimental Results 62
4.4 CONCLUSIONS 67
Chapter 5 VOLTAGE-MODE HIGHPASS, BANDPASS AND LOWPASS FILTERS
USING PLUS-TYPE DDCCs 69
5.1 LITERATURE OF THE FILTER 70
5.2 NEW VOLTAGE-MODE BIQUAD FILTER 74
5.3 SIMULATION RESULTS 78
5.4 SUMMARY 81
Chapter 6 TUNABLE MIXED-MODE OTA-C UNIVERSAL FILTER 83
6.1 LITERATURE OF THE FILTER 83
6.2 NEW MIXED-MODE OTA-C FILTER 87
6.3 SIMULATION AND EXPERIMENTAL RESULTS 91
6.3.1 Simulation Results 91
6.3.2 Experimental Results 98
6.4 SUMMARY 107
Chapter 7 VERSATILE UNIVERSAL VOLTAGE-MODE FILTER EMPLOYING
MINIMUM COMPONENTS 109
7.1 LITERATURE OF THE FILTER 109
7.2 NEW MIXED-MODE OTA-C FILTER 112
7.3 SIMULATION RESULTS 117
7.4 SUMMARY 118
Chapter 8 CONCLUSIONS AND FUTURE WORK 119
8.1 CONCLUSIONS 119
8.2 FUTURE WORK 121
BIBLIOGRAPHY 123
APPENDIX 131
A. VITA 131
B. PUBLICATIONS 133


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