臺灣博碩士論文加值系統

摘 要
在此篇論文中, 第一個主題利用Visual Basic (VB) 軟體編寫執行非揮發記憶體元件(Nonvolatile memory: NVM)的遲滯特性、寫入時間(programming time)、抹除時間(erasing time)、耐久力(Endurance)及保持力(Retention)等特性的自動量測系統，藉由整合HP4284A、HP5270B、HP5250及HP81110A波形產生器等量測硬體設備，使操作者減少量測的人為誤差。
第二個主題製作具HfLaTiON電荷捕捉層之前瞻金氧半(MOS)結構非揮發性記憶體元件，改善非揮發性記憶體元件特性，最主要的三大重點為元件(1)操作快速(2)低操作電壓(3)長資料保存時間；為了達成這些目標，此結構以HfLaON當穿隧(tunneling oxide)及阻檔氧化層(Blocking oxide)，並利用Hf2La2O7及Ti靶材共同濺鍍HfLaTiON高介電材料當作電荷層補捉層(Charge trapping layer)；藉由調整Ti於HfLaTiON的含量及位置的不同，探討其對非揮發性記憶體元件特性研究，實驗結果發現摻雜越多Ti於HfLaTiON層內其遲滯特性越佳，越佳的磁滯特性表示可以降低寫入電壓與抹除電壓，評估寫入及抹除特性時發現摻入適量Ti具有較低寫入電壓及抹除電壓，實驗同時發現Ti位於HfLaTiON之下層有較佳記憶特性包含遲滯電壓、寫入及抹除電壓。

Abstract
In this thesis, the development of electrical and reliability properties measurement system for nonvolatile memory devices was achieved by the visual basic (VB) software. The electrical and reliability properties include hysteresis, programming time, erasing time, endurance and retention. To avoid the personal errors, automatically measurement systems integrated with HP4284A, HP5270B, HP5250, and HP81110A instruments were developed.
Memory characteristics of advanced metal-oxide-semiconductor structured nonvolatile memory with HfLaTiON as charge trapping layer were investigated. The continuous improving non-volatile memory performances are needed for faster speed, lower operation voltage and longer data retention. To achieve this goal, the HfLaTiON dielectric as charge trapping layer was used to improve the data retention. The lower operation voltage is obtained by using HfLaON as tunneling oxide. The fast speed, especially for the slow erase speed, was improved by using HfLaO/HfLaTiON/HfLaO stacked films. By modulated Ti concentrations and position in HfLaTiON dielectric embedded in HfLaON dielectric, the high-quality HfLaTiON charge trapping layer can be achieved for the nonvolatile memory (NVM) devices applications. The results indicate that the hysteresis characteristic, programming/erase time enhanced by the increases of the Ti concentrations incorporated into HfLaTiON dielectric and Ti embedded into the underneath of HfLaTiON.

目錄
摘要………………………………………………………………………i
Abstract……………………………………………………………….….ii
誌謝………………………………………………………...……………iii
目錄………………………………………………………...……………iv
表目錄........................................................................................................v
圖目錄……………………………………………………………….…..vi
第一章 緒論………………………………………….………………….1
1.1 非揮發性記憶體(nonvolatile memory)元件發展概述….………1
1.2高介電常數材料(High-k dielectric)應用於金氧半元件之閘介電層概述………………………………………………………...…1
1.3 高介電係數材料於非揮發性記憶體元件之文獻回顧…………2
1.4 研究動機………………………………………………...……….6
1.5 論文架構……………………………………..…………………..6
第二章 元件製程與量測儀器 …………………………...…………….8
2.1摻雜不同比例Ti之 HfLaTiON 當非揮發性記憶體元件電荷捕捉層之製造流程…………………………….…………………….8
2.1.1晶圓處理……………………………………………………9
2.1.2穿隧氧化層製程………………………………..…………..9
2.1.3電荷捕捉層製程……………………………………..……10
2.1.4阻擋氧化層製程…………………………………………..10
2.1.5電極製程 …………………………………………………11
2.2將Ti置入HfLaTiON中不同位置當非揮發性記憶體之電荷捕捉層之製造流程……………………………………………………12
2.2.1晶圓處理…………………………………………………..12
2.2.2穿隧氧化層製程…………………………………………..13
2.2.3電荷捕捉層製程…………………………………………..13
2.2.4阻擋氧化層製程…………………………..………………14
2.2.5電極製程……………………………………..……………14
2.3 電性特性及可靠度特性量測…………………….……………..15
2.3.1開發Visual Basic自動量測軟體應用於電容型非揮發性記
憶體元件………………………………………………..…15
2.3.1.1自動量測「流程圖」………………..……………….16
2.3.1.2自動量測「記憶體」操作範圍………...……………16
2.3.1.3自動量測「寫入/抹除(Program/Erase Time)」特性..16
2.3.1.4自動量測「耐久力(Endurance)」特性…………..….16
2.3.1.5自動量測「保持力(Retention)」特性…………..…..17
2.3.2元件電容-電壓特性量測(包含遲滯量測)……………..…17
2.3.3元件電流-電壓特性量測(電流機制)………………….….17
2.3.4元件寫入,抹除,耐久力及持久力特性量測…………..…..18
2.4材料物理特性量測……………………………………………….20
2.4.1 紫外光/可見光/光譜儀(UV/VIS/IR)：能隙量測……...…20
2.4.2 化學分析電子儀(XPS) ：組成比量測…………….…….20
第三章 摻雜不同Ti比例及位置之HfLaTiON當非揮發性記憶體元件電荷捕捉層之特性研究……………………………………….34
3.1摻雜不同比例Ti之 HfLaTiON當非揮發性記憶體元件電荷捕
捉層之特性研究………………………………….…………….34
3.2實驗結果與討論…………………………...……………………35
3.3結論………………………………………………………...……41
3.4探討HfLaTiON層中不同Ti位置當非揮發性記憶體之電荷捕
捉層之特性研究 ………………………………………………42
3.5實驗結果與討論………………………………………………...43
3.6結論………………………………………………………..…….45
第四章結論與建議……………………………………………………..80
4-1結論………………………………………..…………………....80
4-2建議..............................................................................................82
參考文獻………………………………………………………………..83
英文論文大鋼
作者簡歷

表目錄
表2-1 Sample A、B、C、D分別以掺入Ti 0nm、0.1nm、0.3nm與0.5nm用來比較當Ti不同厚度時會個別影響不同的電性量測數據。
……………………………………………………………….......22
表2-2 Sample E、F分別以掺入Ti 0.1nm但不同的共同濺鍍時間，用來比較當HfTiLaON不同高度時會個別影響不同的電性量測數據。…………………………………………………………..…..23
表2-3具HfTixLaON電荷捕捉層之濺鍍製程所使用參數。………….24
表2-4 X-ray 表面成分分析儀之製造參數。…………………..……..25
表3-1 Sample A、B、C、D分別以掺入Ti 0nm、0.1nm、0.3nm與0.5nm用來比較當Ti不同厚度時會個別影響不同的電性量測數據及其量測得遲滯電壓。……………………………………...……………………….47

圖目錄
圖2-1 摻雜不同比例Ti之HfLaTiON當非揮發性記憶體元件電荷捕捉層之製造流程。………………………………………...……22
圖2-2 將Ti置入HfLaTiON中不同位置當非揮發性記憶體之電荷捕捉層之製造流程。……………………………………………...23
圖2-3 UV/VIS/IR使用之試片製造製程。……………………….…24
圖2-4 X-ray 表面成分分析儀之製造流程。………………..……….25
圖2-5 使用Visual Basic來開發自動量測非揮發性記憶體的電性與可靠性之流程圖。………………………………………….….….26
圖2-6 自動量測「寫入特性與抹除特性」之程式流程圖。……..….….27
圖2-7 自動量測「耐久力」之程式流程圖。……………………..….….28
圖2-8 自動量測「保持力」之程式流程圖。…………………………....29
圖3-1 為掃描電壓由±10V掃瞄到±18V每次增加1V，量測頻率為100K赫茲在非揮發性記憶體元件的電荷捕捉層無摻入Ti的電容電壓特性量測。……………………………………………...48
圖3-2 為掃描電壓由±10V掃瞄到±18V每次增加1V，量測頻率為100K赫茲在非揮發性記憶體元件的電荷捕捉層共同濺鍍時間Ti為10秒的電容電壓特性量測。………………………..……49
圖3-3 為掃描電壓由±10V掃瞄到±18V每次增加1V，量測頻率為100K赫茲在非揮發性記憶體元件的電荷捕捉層共同濺鍍時間Ti為30秒的電容電壓特性量測。……………………………..50
圖3-4 為掃描電壓由±10V掃瞄到±18V每次增加1V，量測頻率為100K赫茲在非揮發性記憶體元件的電荷捕捉層共同濺鍍時間Ti為50秒的電容電壓特性量測。…………………………..…51
圖3-5 為掃描電壓由±10V掃瞄到±18V每次增加1V，量測頻率為100K赫茲在非揮發性記憶體元件的電荷捕捉層共同濺鍍時間Ti為0秒、10秒、30秒及50秒的電容電壓特性量測綜合遲滯電壓總整理。………………………………………………...52
圖3-6 非揮發性記憶體元件的電荷捕捉層無摻入Ti的正電壓寫入特性量測。…………………………………………………….…..53
圖3-7 非揮發性記憶體元件的電荷捕捉層無摻入Ti的負電壓寫入特性量測。…………………………………………………...……54
圖3-8 非揮發性記憶體元件的電荷捕捉層無摻入Ti正電壓操作的F-N電流機制量測。…………………………………………....55
圖3-9 非揮發性記憶體元件的電荷捕捉層無摻入Ti負電壓操作的F-N電流機制量測。……………………………………………56
圖3-10 非揮發性記憶體元件的電荷捕捉層共同濺鍍時間Ti為10秒的正電壓寫入特性量測為。………………………………..….57
圖3-11 非揮發性記憶體元件的電荷捕捉層共同濺鍍時間Ti為10秒的負電壓寫入特性量測。……………………………………..58
圖3-12 非揮發性記憶體元件的電荷捕捉層共同濺鍍時間Ti為10秒正電壓操作的F-N電流機制量測。…………….…………..….59
圖3-13 非揮發性記憶體元件的電荷捕捉層共同濺鍍時間Ti為10秒負電壓操作的F-N電流機制量測。……………………………60
圖3-14 非揮發性記憶體元件的電荷捕捉層共同濺鍍時間Ti為30秒的正電壓寫入特性量測。…………………………………...…61
圖3-15 非揮發性記憶體元件的電荷捕捉層共同濺鍍時間Ti為30秒的負電壓寫入特性量測。…………………………………...…62
圖3-16 非揮發性記憶體元件的電荷捕捉層共同濺鍍時間Ti為30秒正電壓的操作F-N電流機制量測。…………………………....63
圖3-17 非揮發性記憶體元件的電荷捕捉層共同濺鍍時間Ti為30秒負電壓操作的F-N電流機制量測。…………………...……….64
圖3-18 非揮發性記憶體元件的電荷捕捉層共同濺鍍時間Ti為50秒的正電壓寫入特性量測。………………………………...……65
圖3-19 非揮發性記憶體元件的電荷捕捉層共同濺鍍時間Ti為50秒的負電壓寫入特性量測。…………………………………...…66
圖3-20 非揮發性記憶體元件的電荷捕捉層共同濺鍍時間Ti為50秒正電壓操作的F-N電流機制量測。……………………………67
圖3-21 非揮發性記憶體元件的電荷捕捉層共同濺鍍時間Ti為50秒負電壓操作的F-N電流機制量測。…………………………....68
圖3-22非揮發性記憶體元件的電荷捕捉層無摻入Ti的抹除特性量測。………………………………………………………….…..69
圖3-23 非揮發性記憶體元件的電荷捕捉層共同濺鍍時間Ti為10秒的抹除特性量測。………………………………………….…..70
圖3-24 非揮發性記憶體元件的電荷捕捉層共同濺鍍時間Ti為30秒的抹除特性量測。…………………………………...…………71
圖3-25 非揮發性記憶體元件的電荷捕捉層共同濺鍍時間Ti為50秒的抹除特性量測。…………………………………………...…72
圖3-26 (a)為HfLaTiON接近於穿隧氧化層之非揮發性記憶體元件之電容電壓量測圖 (b)為HfLaTiON接近於阻擋氧化層之非揮發性記憶體元件之電容電壓量測圖。…………...……………73
圖3-27 (a)為HfLaTiON接近於穿隧氧化層之非揮發性記憶體元件示意圖(b) HfLaTiON接近於阻擋氧化層之非揮發性記憶體元件。……………………………………………………….……..74
圖3-28 當Ti與HfLaON共同濺鍍層接近阻擋氧化層的正電壓寫入量測之平帶電壓圖。…………………………………….………..75
圖3-29 當Ti與HfLaON共同濺鍍層接近阻擋氧化層的負電壓寫入量測之平帶電壓圖。……………………………......…………….76
圖3-30 當Ti與HfLaON共同濺鍍層接近阻擋氧化層的F-N機制正電壓操作下之電流圖。……………….………………………..77
圖3-31 當Ti與HfLaON共同濺鍍層接近阻擋氧化層的F-N機制負電壓操作下之電流圖。………………………………...…………78
圖3-32 當Ti與HfLaON共同濺鍍層接近阻擋氧化層的抹除量測之平帶電壓圖。………………………………………….…………..79

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