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研究生:鄭莞學
研究生(外文):Cheng, Wan-Hsueh
論文名稱:具有低輸入電流峰值抽載特性之正負高壓產生器及其在生醫晶片上之應用
論文名稱(外文):Design of High-Voltage Generator with Low Supply Peak Current for Biomedical Applications
指導教授:柯明道柯明道引用關係
指導教授(外文):Ker, Ming-Dou
口試委員:吳重雨陳柏宏林群祐
口試委員(外文):Wu, Chung-YuChen, Po-HungLin, Chun-Yu
口試日期:2015-10-03
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電子工程學系 電子研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2015
畢業學年度:104
語文別:英文
論文頁數:62
中文關鍵詞:電荷幫浦高壓產生器低輸入瞬間抽載
外文關鍵詞:Charge pumpHigh-voltage generatorLow input peak current
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近年來,由於生醫科學與半導體電子的快速發展,電刺激技術已被證明可藉由電流訊號刺激神經來恢復身體的某些功能,例如視網膜、癲癇抑制、電子耳等。在輸出電流刺激時,由於生物組織的阻抗較高,所以在刺激時在組織兩端會有高電壓,故在生醫晶片中需要產生一高電壓與可耐高壓之刺激器。電荷幫浦(charge pump)依據不同的架構可由低電壓產生正高壓與負高壓,此篇論文提出一正高壓電荷幫浦與一負高壓電荷幫浦,並使用低壓製程製作,使用之電荷幫浦架構沒有閘極可靠度(gate-reliability issue)的問題,量測分別可產生10.8V與-10.3V高電壓,並使用回授控制使輸出電壓穩定,最大可輸出3.5mA電流。改變電荷幫浦每級控制訊號,使3.3V之最大輸入瞬間抽載變小,且用四個不同相位之控制訊號可減小電荷幫浦之漏電流(return-back leakage current)的影響,改善電荷幫浦之效率。全電路皆實現在晶片上,不需要外掛電容,適合與其他電路整合在生醫單晶片上,此電路在TSMC 0.18μm 1.8-V/3.3-V CMOS製程下實現。
Nowadays, due to the development of biomedical science and electronics, electrical stimulation had been proven can recover some physical functions of patients by current stimulation such as retinal stimulation, cochlear implant and suppression of epileptic seizure. Because the impedance of tissues is large, the voltage between tissues would be high when the stimulator driver deliver stimulus current. Therefore, we need to generate high voltage and high voltage tolerant stimulus drivers.
Charge pump can generate high positive voltage or high negative voltage from low voltage by different charge pump circuit. A positive charge pump and a negative charge pump has been designed to generate high voltage and negative without gate-reliability issues in low voltage CMOS process. By measurement, the charge pumps can output regulated voltage about 10.8V and maximum current 3.5mA. The output voltage is regulated by PFM control feedback. The maximum output current is 3.5mA. The clock of each charge pump stage has phase shift different from each other, which can reduce the maximum peak current from 3.3V supply. The charge pump also adopt 4-phase clock scheme, which can reduce the return-back leakage and increase the charge pump’s efficiency. The charge pump circuit is fully on chip and had been fabricated in TSMC 0.18μm 1.8-V/3.3-V CMOS process.

摘要 I
Abstract III
Acknowledgment VII
List of Tables VIII
List of Figures IX
Chapter 1 Introduction 1
1.1 Motivation 1
1.2 Thesis Organization 2
Chapter 2 Prior Arts of Charge pump Circuits 3
2.1 Applications of Charge Pump Circuits for Biomedical Implants 3
2.2 Positive Charge Pump Circuit 4
2.2.1 Dickson Charge Pump 4
2.2.2 Charge Transfer Switches Charge Pump 5
2.2.3 Cross-Couple Charge Pump 6
2.3 Negative Charge Pump Circuit 7
2.3.1 4-phase Negative Charge Pump with PMOS Charge Transfer Switches 7
2.3.2 Cross-Couple Negative Charge Pump 10
2.3.3 4-phase Negative Charge Pump with NMOS Charge Transfer Switches 12
Chapter 3 Design of Positive Charge Pump Regulator with Low Input Peak Current 15
3.1 Design of Positive Charge Pump Regulator 15
3.1.1 Circuit Block Diagram of Proposed Positive Charge Pump Regulator 15
3.1.2 Charge Pump Circuit and 4-phase Clock Generator 18
3.1.3 Bandgap Reference, Error Amplifier, VCO and Phase Shift Clock Generator 20
3.2 Simulation Results 22
3.3 Measurement Results 24
3.4 Application on Biomedical Stimulation Circuit 32
3.5 Summary 34
Chapter 4 Design of Negative Charge Pump Regulator with Low Input Peak Current 35
4.1 Design of Negative Charge Pump Regulator 35
4.1.1 Circuit Block Diagram of Proposed Charge Pump Regulator 35
4.1.2 Negative Charge Pump and 4-phase Clock Generator 37
4.1.3 Error Amplifier, VCO and Phase Shift Clock Generator 42
4.2 Simulation Results 43
4.3 Measurement Results 45
4.4 Summary 56
Chapter 5 Conclusions and Future Works 57
5.1 Conclusions 57
5.1.1 Positive Charge Pump 57
5.1.2 Negative Cross-Couple Charge Pump 57
5.2 Future Works 57
5.2.1 Charge Sharing 57
5.2.2 Negative Charge Pump 58
References 60
Vita 62

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