臺灣博碩士論文加值系統

帕金森患者接受左多巴藥物治療，確實能得到症狀的改善；然而，用藥幾年後，多半會面臨藥效窗口變窄的「開關現象」。此時，以外科手術進行的「深腦刺激術（Deep Brain Stimulation，簡稱DBS）」，便成了另一種治療選擇。
本篇主旨為提出一應用於帕金森氏症治療系統(深部腦刺激)之全差動前置放大電路，目的用以將局部場電位訊號放大並且濾除非帕金森氏症相關頻段之成分。在子電路上設計，為了將非理想成份諸如閃爍雜訊、熱雜訊等消除，提高其訊號雜訊比，以增加局部場電位訊號之可辨度，本電路採用全差動雙級反向運算放大器，並藉由設計電晶體尺寸來抑制雜訊，將輸入級的場效電晶體操作於弱反轉區，以此降低電路在低頻產生的閃爍雜訊並降低電路的功率消耗。另外，考量到低通濾波器的電阻也使用虛擬電阻的話，會導致輸出訊號有失真的現象，因此將此電阻由切換式電容電阻取代可降低訊號的失真，並將系統增益設計為50dB、60dB、70dB的可調倍率可以避免輸出訊號因飽和而失真。針對產生極低頻極點需要的大電阻，在此架構中使用虛擬電阻來實現，考慮到PMOS電晶體所提供的低頻閃爍雜訊小，故採用PMOS來實現此虛擬電阻。整體電路以高解析度、低功耗及低雜訊為設計目標，以符合生醫電子系統之效能要求。
本文所提整體前置放大電路之頻寬設計為1Hz至100Hz(可調)。在電路實現上，當輸入訊號頻率30Hz、1mVp輸入振幅、系統增益50dB的情況下，此架構之整體總諧波失真率(THD)為-74.9dB。本電路使用TSMC 0.18μm標準CMOS 1P6M製程完成。在1.8 V電源供應下，總功率消耗約為35μW，輸入參考雜訊為0.93μVrms。

Parkinson patients, receiving L-DOPA drug treatment, can really get the symptoms improved; however, after several years of treatment, most of them will face a "switch phenomenon" with poor efficacy. At this point, the "Deep Brain Stimulation (DBS)", which has undergone surgery, has become another treatment option.
The subject of this paper is to propose a fully differential preamplifier circuit for the Parkinson's disease treatment system (deep brain stimulation) to amplify the local field potential signal and filter out the components of the non-Parkinson's disease-related frequency band. In the sub-circuit design, to eliminate non-ideal components, such as flicker noise, thermal noise, etc, improve its signal to noise ratio, and increase the local field potential signal resolution, the circuit uses a two-stage fully differential inverter-based CMOS amplifier. And by designing the transistor sizes, the two-stage fully differential inverter-based CMOS amplifier can suppress noise. The transistors of the input stage operating in the weak inversion region can reduce the flicker noise and the power consumption. In addition, if the resistor in the low-pass filter has also used the virtual resistance, the output signal will lead to distortion of the phenomenon. So this resistor is replaced by switched-capacitor resistor to avoid signal distortion. The system gain is designed to be adjustable among 50dB, 60dB, and 70dB magnification that can avoid the distortion of output signal due to saturation of the amplifier. Pseudo-resistors are used with the large resistance required to produce very low frequency poles. PMOS is used to implement the pseudo-resistor, because the flicker noise of the PMOS is smaller at the low frequency. The overall circuit has the performance of high resolution, low power consumption, and low noise to achieve the specification of a health electronic system.
The bandwidth of the overall preamplifier circuit is designed to be from 1Hz to 100Hz. When the input signal is 30Hz, 1mVp, the system gain is 50dB and the total harmonic distortion (THD) is -74.9dB. This circuit was fabricated by TSMC 0.18μm standard CMOS 1P6M process. At 1.8V power supply, the total power consumption is about 35μW and the input-referred-noise is 0.93μVrms.

摘要 iii
ABSTRACT v
誌謝 vii
目錄 viii
圖目錄 x
表目錄 xii
第一章 緒論 1
1.1 研究背景 1
1.1.1 局部場電位訊號( Local Field Potential Signal ) 1
1.1.2 閉迴路腦刺激系統( Closed Loop Stimulation System )2
1.2 研究動機 3
1.3 論文架構 4
第二章 背景 5
2.1 場效電晶體之雜訊源及模型 5
2.1.1 熱雜訊( Thermal Noise ) 6
2.1.2 閃爍雜訊(Flicker Noise) 9
2.1.3 傳統運算放大器雜訊分析 11
2.2 取樣定理 14
2.3 弱反轉區 15
第三章 交換電容電路 21
3.1 交換電容電路開關的設計及考量 21
3.1.1 以MOSFET做為開關 21
3.1.2 MOS採樣開關之非理想效應 23
3.1.3 電荷注入抵消 26
3.2 電阻擬態 29
3.3 交換式電容電路操作原理分析 31
3.3.1 敏感性積分器 32
3.3.1 非敏感性積分器 34
第四章 前置放大器 37
4.1 系統架構一簡介 37
4.1.1 系統架構一分析 37
4.1.2 內部電路分析 41
4.2 系統架構二簡介 51
4.2.1 刺激防護電路 52
4.2.2 刺激電極介紹 56
第五章 模擬與量測結果 58
5.1 電路模擬結果 58
5.1.1 架構一後模擬結果 58
5.1.2 架構二後模擬結果 66
5.1.3 模擬比較表 68
5.2 電路佈局 69
5.3 量測環境設定與結果 71
5.3.1 量測環境設定 71
5.3.2 功耗量測結果 73
5.3.3 function量測結果 73
5.3.4 頻率響應量測結果 76
5.3.5 頻譜量測結果 78
5.3.6 雜訊量測結果 79
5.3.7 量測和模擬結果比較 80
5.3.8 晶片微顯圖 81
第六章 結論與未來展望 82
6.1 結論 82
6.2 未來展望 83
Reference 84

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