臺灣博碩士論文加值系統

近年在智慧型手機、物聯網(Internet of things, IoT)等相關應用的蓬勃發展下，低功耗的電子元件有迫切發展的需求，穿隧式電晶體(Tunneling FET, TFET)和負電容電晶體(Negative Capacitance, NCFET)是目前已經被證實能突破傳統金氧半場效電晶體小於60mV/decade次臨界擺幅(S.S)的熱物理極限，使得電晶體可以在更小的偏壓操作下開啟電晶體元件。由於TFET有導通電流(Ion)較低的缺點，因此具有負電容效應的NCFET就具有優勢發展成為低功耗之電晶體元件。
新興的氧化鉿基(HfO2-based)鐵電材料保有傳統鐵電材料(SBT、PZT…)極化性強的優點，並能克服傳統鐵電材料不能微縮的問題，然而因為元件的持續微縮，此新興鐵電材料面臨了新的挑戰，在閘極堆疊層厚度微縮時，由於漏電流的產生，導致鐵電材料極化能力會抑制。因此在本論文中，我們研究目前發展最成熟之氧化鉿鋯鐵電材料於負電容電晶體應用，首先藉由鋯摻雜濃度的不同，探討其對鐵電性的影響，當鋯摻雜濃度越高，其擁有更強的鐵電特性，但當摻雜過高時，卻又會造成鋯原子的擴散，進而使漏電流過高，所以適當的摻雜濃度除了能夠保有鐵電特性，又不會導致高漏電流。其次，我們嘗試微縮氧化鉿鋯鐵電薄膜，發現在厚度微縮至7奈米時，由於晶粒尺寸效應，其電晶體依然能保有負電容特性。最後，為了研究鋯擴散與介面緩衝層之關係，雖然使用較薄的緩衝層會較容易使鋯擴散，造成較高的薄膜漏電流，但是其具有良好的閘極控制能力，而當使用較厚的介面層時，其顯著的去極化效應將會造成鐵電層的閘極控制力明顯降低，導致電晶體關閉電流明顯上升。因此，在對氧化鉿鋯電晶體於摻雜效應、鐵電層與緩衝層厚度效應的探討後，可以歸納出最佳化條件來優化氧化鉿鋯鐵電負電容電晶體，並且搭配於雙極性N型及P型負電容電晶體的實現，此研究結果將有助於未來於低功耗CMOS電路技術的整合應用。

In recent years, with the flourish of smart phones, Internet of Things (IoT) and other related applications, low-power consumption electronic devices are in urgent need. Tunneling FETs (TFETs) and Negative Capacitances (NCFETs) are been investigated to be different from traditional Si-based FETs to break through the thermophysical limitation of less than 60mV/decade subthershold (SS), allowing the transistors to turn on the devices with less biasing. Since the TFET has a shortage that Ion is hard to improve and a tradeoff effect with Ioff, the NC-FETs with negative capacitance effect have the potential to develop a low-power consumption transistor device.
The new ferroelectric materials retain the advantages, strong polarization performances, of traditional ferroelectric materials (SBT, PZT...) and overcome the problems that traditional ferroelectric materials cannot be shrunk. However, new challenges have been emerged due to the influence of miniaturization. The thinner the overall buffer is, the thinner the buffer layer and the ferroelectric layer are, resulting in a stronger ferroelectric material polarization, and a leakage current is increased at the interface. In this master thesis, we investigate ferroelectric HfZrO material which is the most mature HfO2-based ferroelectric application so far. First, we investigate the influences on ferroelectricity of different Zr dopant content. The high dopant content induces stronger ferroelectricity. However, when Zr dopant content too high, it will result in zirconium diffusion and further induce high leakage current. Therefore, the appropriate Zr dopant content not only can keep the strong ferroelectricity but also avoid high leakage current issue. Next, we try to scale the HfZrO thin films, finding that the thickness at 7nm can remain ferroelectricity due to the grain size effect. Last, in order to study relationship with the Zr diffusion and the interfacial layer, we fabricate different thickness of interlayer. Although thin interlayer is prone to Zr diffusion and lead higher leakage current, it exhibits good performance on gate controllability. When thicken the interlayer, the obvious depolarization will degrade the gate controllability on ferroelectric gate-stack and further induce increasing Ioff in MOSFET apparently. As a result, the investigation on Zr dopant content in HfZrO NC-FET, ferroelectric gate-stack scaling and the thickness of interlayer effect, we can sum up the optimization of HfZrO NC-FET. With the success of bipolar N-type and P-type NC-FET, the investigation will help the future integration of low-power CMOS circuit technology.

摘要…………………………………………………………………..…………………………i
ABSTRACT……………………………………………………..……………………………iii
ACKNOWLEDGEMENTS……………………………………………………………………v
CONTENTS…………………………………………………………………………………...vi
FIGURE CAPTIONS……………………………………………………………………….....ix
TABLE CAPTIONS……………………………………………………………………..…....xv
1. INTRODUCTION……………………………………………………………..................1
1.1 Background……………………………………………………………............................1
1.2 Introduction of Negative Capacitance FET………………………………………………4
1.3 Characteristics of Ferroelectric Material………………………………………………….8
1.4 Zirconium Diffusion Issue in Gate Stack………………………………………………..11
1.5 Motivation…………………………………………………………….............................14
2. LITERATURE REVIEW……………………………………………………………......15
2.1 Dopant Induced Phase Transition of HfxZr1-xO………………………..……………..…15
2.2 Ferroelectric and Anti-ferroelectric Behavior with Zr Dopant……………….…………17
2.3 Thickness Induced Phase Transition………………………………………………….....20
3. EXPERIMENTAL PROCEDURE………………………………………………………23
3.1 Device Fabrication……………………………………………………………................23
3.2 Material and Electrical Analysis………………………………………………………...27
3.2.1 Grazing Incidence X-Ray Diffraction (GIXRD) analysis………………………….27
3.2.2 PUND Measurement……….……………………………………………………....29
4 RESULTS AND DISCUSSIONS……………………………………………………….33
4.1 Crystallinity of HfZrO with Dopant Effect and Interlayer Effect………………….........33
4.2 Ferroelectricity of HfZrO MFM Capacitors……………………......…………………...35
4.2.1 Annealing Temperature Effect of HfZrO...………………………………………..35
4.2.2 Zirconium Dopant Effect………………….……………………………………….37
4.2.3 Thickness Scaling Effect of Hf1-xZrxO………………...…………………………...39
4.2.4 Thickness Effect of Interfacial Layer…...……………………………………….....41
4.2.5 Polarization Current for Comprehensive Comparison……………………………..43
4.3 Investigation of HfZrO NC-NFET……………………………………...…………….…47
4.3.1 HfZrO NCFET with Zr Dopant Effect……………………………………………..47
4.3.2 Interlayer Thickness Effects on HfZrO……………………...…………..…………54
4.4 Investigation of HfZrO NC-PFET…………………………………………………........59
4.4.1 HfZrO NCFET with Zr Dopant Effect……………………………………………..59
4.4.2 Interlayer Thickness Effects on HfZrO……….....…………………………………64
5 CONCLUSION…………………………………………………………….....................71
Future Work……………………………………………………………...…………72
REFERENCES……………………………………………………………..............................73
個人簡歷(Vita) ……………………………………………………………............................78

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