臺灣博碩士論文加值系統

交通安全一直以來都是人們所關心的話題，本論文即時瞳孔偵測系統為一個駕駛警示系統，透過影像處理的方式，從攝影機擷取影像進行瞳孔偵測，並且根據偵測結果進一步分析使用者雙眼的開闔狀態，經由開闔狀態判別使用者是否為瞌睡狀態，並且適時的以蜂鳴器給予警示。
本論文提出一個以純硬體的數位電路來實現即時瞳孔偵測系統，以人臉偵測為基礎，進而發展出瞳孔偵測系統，最後應用於瞌睡警示系統，此系統分為兩大部分:(1)軟體端的前置作業，(2)硬體端的實際運作。軟體端的前置作業主要為以機器學習(Machine Learning)的方式產生硬體端在進行人臉驗證所需要的分類器，主要分為三個步驟: (1)人臉特徵提取，(2)弱學習演算法，(3)Adaboost演算法。在硬體端的實際運作主要分為五個步驟:(1)人臉候選區截取，(2)人臉驗證，(3)瞳孔候選區截取，(4)瞳孔偵測，(5)行為分析，將這些步驟以模組化方式設計成硬體電路，此系統使用Verilog硬體描述語言(Hardware Description Language)以純硬體的方式設計，最後實現在Terasic DE2-115多媒體開發平台上。
實驗結果顯示此系統使用了個87,708個邏輯元件(logic elements)，共佔用了Terasic DE2-115的76%，系統偵測率為86%，且處理速度為每秒達30張影像(NTSC Input)。

Traffic safety has been an important issue for most people. In this thesis, a real-time pupils detection system is applied to drowsiness alert system to improve the driving safety. Through image processing, pupils detection system can detect user’s pupils from the input image by camera and further analyze user’s eyes status. According to analysis results, the system can judge whether the user is in the state of drowsiness or not and provide the warning buzzer for the people who fall asleep.
In this thesis, we proposed a real-time pupils detection system based on hardware design. This research is on the basis of face detection to develop a pupils detection system, and apply to drowsiness alert system. This system is divided into two parts: (1)Off-line work based on PC software environment, (2)Real-time processing based on FPGA hardware architecture. The classifier needed for face examination on the FPGA is produced using the PC-based Machine Learning. There are three basic steps in machine learning: (1)Haar-like Features Extraction, (2)Weak Learning Algorithm, (3)Adaboost Algorithm. There are five basic steps in real-time processing: (1)Face Candidate Extraction, (2)Face Examination, (3)Pupils Candidate Extraction, (4)Pupils Detection, (5)Eyes Behavior Analysis. Each step is designed and modularized with Verilog HDL. It is implemented with Terasic DE2-115 development board. The experimental results show that the system costs 87,708 logic elements, which is about 76% of total logic elements of DE2-115. The system detection rate is 86% and the processing speed can reach 30FPS.

摘要 I
Abstract II
誌謝 III
目錄 IV
圖目錄 VII
表目錄 X
第一章 緒論 1
1.1研究動機 1
1.2文獻回顧 2
1.3論文目標 3
1.4論文組織 3
第二章 開發環境與系統架構 5
2.1人臉訓練環境 5
2.2演算法驗證環境 5
2.3 FPGA驗證環境 6
2.4攝影機介紹 7
2.5系統架構 7
第三章 人臉偵測與瞳孔偵測 9
3.1人臉候選區定位 9
3.1.1膚色偵測 9
3.1.2形態學 12
3.1.3快速連通標記法 14
3.1.4候選區過濾 18
3.2人臉候選區驗證 19
3.2.1 Haar-like特徵 19
3.2.2弱學習演算法 20
3.2.3 Adaboost演算法 22
3.2.4積分影像 25
3.3瞳孔候選區定位 26
3.3.1邊緣偵測 26
3.3.2候選區定位 27
3.4瞳孔偵測與定位 28
3.5行為分析 29
第四章 系統硬體實現 32
4.1膚色偵測硬體設計 33
4.2 形態學與邊緣偵測硬體設計 33
4.2.1膨脹 34
4.2.2侵蝕 34
4.2.3邊緣偵測 35
4.3快速連通標記法硬體設計 35
4.4人臉候選區截取硬體設計 38
4.5積分影像硬體設計 39
4.6瞳孔候選區截取硬體設計 42
第五章 實驗結果與分析 45
5.1影像序列一之實驗結果 45
5.2影像序列二之實驗結果 46
5.3影像序列三之實驗結果 48
5.4影像序列四之實驗結果 49
5.5影像序列五之實驗結果 50
5.6總偵測率與硬體使用資源分析 51
第六章 結論與未來研究方向 53
6.1結論 53
6.2未來研究方向 53
參考文獻 55

[1]Kai-Ti Hu, Yu-Ting Pai, Shanq-Jang Ruan and Edwin Naroska, “A hardware- efficient color segmentation algorithm for face detection,” IEEE Asia Pacific Conference on Circuits and Systems, pp. 688-691, 2010.
[2]Rein-Lien Hsu, Mohamed Abdel-Mottaleb and Anil Jain, “Face detection in color images,” IEEE Transactions on Pattern Analysis and Machine Intelligence, Vol. 24, pp. 696-706, 2002.
[3]Abdenour Hadid, “The local binary pattern approach and its applications to face analysis,” First Workshops on Image Processing Theory, Tools and Applications, pp. 1-9, 2008.
[4]Constantine P. Papageorgiou, Michael Oren and Tomaso Poggio, “A general framework for object detection,” IEEE Sixth International Conference on Computer Vision, pp. 555-562, 1998.
[5]Rainer Lienhart and Jochen Maydt, “An extended set of haar-like features for rapid object detection,” IEEE International Conference on Image Processing, Vol. 1, pp. 900-903, 2001.
[6]Huabiao Qin, Lianbing Tian and Zongwei Hu, “A highly parallelized processor for face detection based on haar-like features,” IEEE International Conference on Electronics, Circuits and Systems, pp. 985-988, 2012.
[7]Masayuki Hiromoto, Hiroki Sugano and Ryusuke Miyamoto, “Partially parallel architecture for adaboost-based,” IEEE Transactions on Circuits and Systems for Video Technology, Vol. 19, pp. 41-52, 2009.
[8]Paul Viola and Micheal Jones, “Rapid object detection using a boosted cascade of simple features,” IEEE Computer Society Conference on Computer Vision and Pattern Recognition, Vol. 1, pp. 511-518, 2001.
[9]Lifeng He, Yuyan Cha, Kenji Suzuki and Kesheng Wu, “Fast connected-component labeling,” Pattern Recognition, Vol. 42, pp. 1977-1987, 2009.
[10]Lifeng He, Yuyan Chao and Kenji Suzuki, “A run-based two-scan labeling algorithm,” IEEE Transactions on Image Processing, Vol. 17, pp. 749-756, 2008.
[11]Mohammad Reza Ramezanpour Fini, Mohammad Ali Azimi Kashani and Mohammad Rahmati, “Eye detection and tracking in image with complex background,” IEEE International Conference on Electronics Computer Technology, Vol. 6, pp. 57-61, 2011.
[12]Shuo Chen and Chengjun Liu, “Fast eye detection using different color space,” IEEE International Conference on Systems, Man, and Cybernetics, pp. 521-526, 2011.
[13]1364-2005 - IEEE Standard for Verilog Hardware Description Language, Revision of IEEE Std 1364-2001.
[14]Terasic DE2-115 datasheet.
URL:http://www.terasic.com.tw/
[15]Sony EVI-D70技術手冊.
URL:http://pro.sony.com/bbsc/ssr/product-EVID70P/