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The gate's metal-stripe spacing for conventional PBT is
required to be in the submicron range. The requirement for
submicron design is commom problem for device implementation.
The use of dual-gate structure for PBT can solve this problem.
The Dual-gate PBT offers an additional barrier control by the
spacing between the upper and lower gratings. So, the Dual-gate
PBT allows a much large range of spacing design for the two
neighboring gate's metal in the same plane. In the first part
of this thesis, the two-dimensional numerical simulations for
the Dual-gate PBT were made. The influences of variations in
doping concentration, spacing between the upper and lower
gratings, and gate's metal thickness on internal device
operation and transconductance have been considered. We found
that by proper choice of the device parameters, enhancement and
depletion mode devices can be obtained. The Early effect is
reduced for the Dual-gate PBT as compared to the conventional
PBT. Using the dual-gate structure for PBT to offer more
freedom in device design is at the expense of reduced
transconductance. In the second part of this thesis, a
Schottky/2DHG barrier diode based on boron δ-doped silicon
grown by molecular beam epitaxy (MBE) was fabricated.
Preliminary measurements included I-V and C-V characteristics
from both single and coupledδ-doped devices. Breakdown
voltages over 50 V and 35 V were obtained for the single and
coupled δ-doped devices, respectively. The zero-bias
capacitance of the coupled δ-doped layer diode is about twice
that of the single δ-doped layer diode. The coupled δ-doped
layers diode exhibits a larger C-V nonlinearity, and a higher
RC cutoff frequency fc is expected for the coupled δ-doped
layers devices.
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