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In von Neumann architecture, the sequential behavior of program
counter limits the parallelism of execution. Dataflow execution
model provided an efficient alternative. At the abstract level
(not necessarily the implementation) it provides the
possibility of exploiting maximal parallelism in a program.
However, dataflow execution model possesses some intrinsic
problems on its own. In a dynamic data-driven structure, a
matching unit is required to collect all data with the same
tag. In general, matching unit is the major bottleneck of the
dynamic dataflow architecture. Thus, how to improve the
performance of matching process is one of the major course in
designing a dataflow computer. In this thesis, we presented a
hybrid computer architecture which incorporated dataflow
computation into the von Neumann style pipelined computer. The
proposed architecture consists of a pipeline, and the execution
of instructions is data-driven. Furthermore, data, instead of
being flown around, are stored in memory and the direct memory
addresses of the data are used as the tags associated with them
and no extra hardware units or matching operations are required
in our architecture. Also, an emulator is designed on
Transputer to evaluate the proposed architecture.
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