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In this thesis, a self-diagnostic BIST RAM structure for the embedded RAM which achieves the self-diagnostic capability with only a minimal overhead is proposed. The BIST structure degrades a little on the speed performance of the RAM in normal operation. Two sets of test patterns which can detect most of the models of failures are adopted to speed up the self-testing and diagnosis. With self-diagnosis capability, this BIST RAM design can be incorporated with the self-repaired redundant design to increase the yield of the embedded RAM.
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