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In this thesis, a new cache coherence protocol named NTU protocol for shared-memory, shared-bus multiprocessor is proposed. This protocol is designed to reduce the amount of traffic on the shared bus and thus to increase the scalability of the system. This protocol has six cache states. Based on trace-driven simulations, this protocol reduces bus traffic by 10% and to 50% when compared with the Berkeley ownership protocol and the Mbus protocol. We prove this protocol will be more appropriate in future (Increment of the bus width, the CPU no., and difference of speed between CPU and Main memory), special in the policy of process migration.
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