臺灣博碩士論文加值系統

由於近年來A/D轉換器於訊號處理( 包括資料穫取系統或資料分散系統
)和視訊系統中(VCR 與 HDTV)占有重要的地位,其中又以 取樣/保持放大
器電路為其重要的關鍵零組件。本論文就是針對如何設計一個高速單晶
的 取樣/保持 電路做進一步的探討。這其中包括開口延遲時間 (
aperture delay time),獲取時間 (Acquistion Time),傾斜率 (Drop
rate),增益誤差 (Gain Error) 與偏移誤差 (Offset Error) 之降低做考
量。本電路的製程技術是採用2 um, Double Poly, +/-5V 的製程,而運算
放大器的設計是採用CMOS FOLD-CASCODE 的電路結構,其著眼於此種的電
路結構有高增益(High Gain)與寬頻帶(Wide Band)的特性,而吾人所設計
出的運算放大器有53dB 增益,50MHZ 頻寬。

Since A/D conversion in signal processing field (include da-
ta acquisition system or data distribution system) or video
sys- tem (VCR and HDTV) field is possessed of an important
position, particular sample/hold circuit is a key component.
This paper de- scribes how to design a high speed monolithic
sample/hold ampli- fier circuit and make a discussion in
detail. It is considerable that aperature delay time,
acquistion time, drop rate, gain error and offset error reduce.
The sample/hold circuit implement with a 2um double_ploy CMOS
process and +/-5V power supply. In order to obtain good high
frequency performance, the operation amplifier adoped the
CMOS fold_cascode structure. This structure has high gain and
wide band. We design CMOS fold_cascode operation which has
40dB and 50MHZ bandwidth.