本論文其重點在於設計及製作高速度互補式金氧半頻率合成器。頻率合成
器已廣泛應用在無線通訊系統,控制電路,電子合成器等。我們希望其工作
頻率範圍在300百萬赫茲。利用國科會晶片實現中心所提供之0.8微米雙層
複晶矽雙層金屬互補式金氧半積體電路製程來從事設計及電路佈局。由
Hspice電路模擬中所得到的結果,可看出在300百萬赫茲至400百萬赫茲頻
率範圍內,壓控振盪器可得到一較佳之線性區域,此一區域即決定頻率合成
器之工作頻率,在可程式計數器設計上,我們做了部份簡化以配合晶片製作
。但是在後面章節中,將會討論可程式計數器之設計,以提昇其應用範圍。
在量測方面,壓控振盪器在供應電壓降到3伏特以下,壓控振盪器可得到一
線性區域於與模擬所得到的結果做比較。最後對此晶片提出一些改進方法

This thesis deals with the design and implementation of a high
speed CMOS frequency synthesizer. Frequency synthesizers are
widely used in many fields such as wireless communication
systems, control circuit, electronic synthesizer, etc. The
desired range of operation frequency is from 300MHz to 400MHz.
We use 0.8um double-poly double-metal CMOS process, provided by
Chip Implementation Center, to design this chip. From the
simulated results, we can get a linear region of the voltage
controlled oscillator from 300MHz to 400MHz. It will determine
the operation frequency of this frequency synthesizer. In order
to simplify our design, the programmable counter is modified.
But we will focus on the programmable counter in the later
chapter to promote the performance. In our measurement, the
supply voltage should be descreased to 3 V. We can compare the
simulated result with measured result. At last, we will modify
the chip to get higher performance.