臺灣博碩士論文加值系統

本文廣泛的討論元件擺置問題, 內容涵蓋晶片階層的元件擺置、混成電路
的元件擺置、與印刷電路板的元件擺置等問題。此外, 本文尚旁及熱控制
技術與電子裝置的可靠性評估等重要課題。在晶片階層的元件擺置上 ,
本文所提出的方法著重於分散繞線的複雜度以獲得高品質的擺置結果。在
混成電路及印刷板電路上, 本文的方法不但考慮繞線的難易更加上了高可
靠性的考慮, 因此更能切合實際設計上的需要。此外由於單憑元件擺置的
最佳化無法完全克服散熱的問題, 本文更進一步提出新的散熱技術以有效
的降低電子裝置的外熱阻, 進而降低元件的接面溫度, 提昇元件的可靠性
。

This work focuses on the automatic placement for integrated
circuits. It covers topics such as printed circuit boards,
power hybrid circuits, and integrated circuits such as standard
cell, gate matrix, and Weinberger designs. In addition, thermal
management technology and reliability prediction also are
considered. All of the algorithms presented in this study are
based on hypergraph structures. For chip level placements, one-
dimensional approaches are presented for different layout
styles. The presented methods can munimize the maximum routing
density of placements, thus obtain high quality results. A
hierarchical placement procedure is developed to take care of
both reliability and wireability for hybrid circuits. Results
indicate that our method can distribute the temperature profile
on the substrate more uniformly and thus improves the system
reliability. Following the reliability improvement the
wireability only degrades slightly. For board level placement,
a placement scheme which couples both wireability and
reliability for convectively cooled boards is presented. An
ordered best-first search algorithm is presented for solving
the two-objective optimization problem. The first solution
obtained by the algorithm has very high quality in system
failure rates. This is very important especially for large-
sized problems, since it infers that one can obtan high
quality solutions with less computation time.

封面
提要
目錄
表目錄
圖目錄
一、導論
1.1 系統階層
1.2 印刷板階層
1.3 晶片階層
二、電路的抽象模型
三、電路分割
四、晶片層次的元件佈置法
4.1 節點合併演算法
4.2 去叢聚演算法
五、混成電路的元件擺置法
5.1 熱元件的擺置
5.2 冷元件的擺置
5.3 實體擺置
六、印刷電路板的元件擺置
七、迭次改善演算法
八、散熱設計
九、可靠性評估
十、結論
英文版論文