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In this thesis, we present a channel manager(CM) for variable
bit rate (VBR) based data transmission structure, so that
channel utilization ratio can be enhanced. That is, more
sources use the same network channel to transmit their data
under this CM structure. Also, we design two VLSI modules of
CM: one is a high speed sorter for the priority selection in
this CM structure, and the other is a data encryption chip for
communication security. We also present automation CAD
viewpoints for the design flow under development in our
research Lab, where we briefly discuss the design methodology
and verification approach based on the available CAD tools.
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