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This thesis investigated novel techniques to form the
silicided shallow junctions for the application in ultra-large-
scale-integrated (ULSI) circuits. The experiments divided the
contents into two parts for the MOSFET applications. One part
is for the silicided shallow junctions of source and drain, and
the other is for the silicides sidewall spacer oxide of gate.
The discussion of source/drain applications included the
thermal stability of metal silicides on ion implanted
polysilicon (ITP), ion implanted amorphous silicon, and ion
implanted stacked amorphous silicon (ITSA). For nickel
silicide, the sheet resistance values of ITP samples got worse
at 900 ℃, but for 25keV implanted ITA sample, the sheet
resistance value didn't get worse at 900℃ annealing. For ITSA
samples, both of 25keV and 70keV- implanted sample annealed at
900℃ could keep the sheet resistance as low as at 800℃
annealed. However, for cobalt silicide and titanium silicide,
all of the three kinds of silicon structure could keep low
sheet resistance after 1000℃ and 950℃ annealed, respectively.
In the experiments we also inspected the silicide formation in
small size windows. Nickel silicide tended to agglomerate as
the annealing temperature rose, however, cobalt silicide didn't
have this phenomenon. But for titanium silicide, because there
was a C49 to C54 phase transformation at 750℃, the silicide/
silicon interface for 750℃ annealed samples were more rough
than the 850℃ and 950℃ annealed samples. For gate
application, we discussed the bridging effect of sidewall
spacer oxide and find the lower annealing temperature leaded to
smoother silicide surface. And annealing in Ar ambient could
lead to more smooth surface below 500℃ but annealing in N2
ambient leaded to more smooth surface at 550℃.
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