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研究生:葉俊祺
研究生(外文):Yeh, Jun-Chyi
論文名稱:半空乏型矽氧化絕緣基片MOS元件之熱電子可靠性
論文名稱(外文):Hot-Electron Reliability of Partially-Depleted SOI MOSFET's
指導教授:莊紹勳
指導教授(外文):Steve S. Chung
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電子研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:1996
畢業學年度:84
語文別:中文
論文頁數:65
中文關鍵詞:矽氧化基片寄生雙極性電晶體熱電子可靠性
外文關鍵詞:SOIparasitic BJThot-carrier reliability
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矽氧化絕緣基片金氧半電晶體在超大型積體電路的應用上深具潛力, 相對
於傳統的 CMOS技術它具有許多的優點, 如較高的包裝密度, 更快的切換
速度, 避免 latch-up 的結構和製程的簡單等. 但相對的, 它的隔離技術
也帶來了浮動基體的問題. 浮動基體會產生許多對元件操作具有傷害性的
寄生效應, 如寄生雙極性電晶體效應, 我們將對此浮動基體效應所引發的
熱電子可靠性做一研究. 本論文中, 結果顯示 SOI元件由於具有浮動基體
效應,其熱電子可靠性所引發的元件退化將會比矽基片元件更嚴重, 這是
由於浮動基體效應所引發的額外的雙極性電晶體電流成分, 將會加速元件
的退化. 此外, 我們將引進一種新的基體接腳的結構. 使用此結構, 再配
合閘控二極體的量測技巧, 可萃取出界面缺陷的分佈. 而我們發現, 假使
SOI元件具有基體接腳, 則其熱電子可靠性將被大幅改善, 這是由於基體
接腳使得雙極性電晶體電流大幅減少的緣故. 因此, 我們認為寄生雙極性
電晶體電流是造成元件加速退化的主要原因. 假使我們能去除此寄生效
應, 則 SOI元件將成為一令人期待的高效能的深次微米元件.

Silicon-On-Insulator (SOI) technology has become an
attractive candidate for ULSI circuit applicationas, since it
has many advantages by comparing with the conventional CMOS
technology such as higher packing density, faster switching
speed, latchup-free and process simplicity. In contrast, the
isolation technique also bring about a major drawback, i.e., the
substrate floating. The floating body will induce undesirable
parasitic effect such as BJT effect which is detrimental to
device operation. Mechanism or the understanding of this
BJTinduced effect is not sophisticated. As a result, we study
the hot-carrier reliability issue of SOI MOSFET's due to the
floating-body effects in this work. In this thesis, we will
show that the SOI devices degrade faster than bulkdevices due to
the floating-body effects. The floating-body effects induce
anadditional component, i.e., the BJT current, to enhance the
damages of the device during operation. We use 2D simulator and
experimental data to seperate this component from each other.
Based on the information, the qualitative desciption of BJT
current is observed. Moreover, we introduce a novel body contact
structure to study the floating-body effects. By using the
contact structure, in combination with gated-diode measurement
technique, the spatial distributionof interface traps can be
directly observed. We found that hot-carrier-induceddegradation
of SOI devices will be largely reduced if appropriated body
contact structure is used. Again, by simulation, we prove that
the BJT current component decreases for devices with body
contact. In other words, we suggestthat the BJT urrent omponent
is the main reason to the devie degradation. Toeliminate this
effet, the SOI devies should be a promising candidate for
highperformance deep submicron SOI MOSFET's.

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